PFC Converter Charge Timing for Low Harmonic Distortion
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Solution Overview
Problem
PFC converters create total harmonic distortion of input current above acceptable limits due to negative inductor currents at the start of each charge mode, which is not adequately addressed by existing voltage-mode control.
Innovation Solution
Implement a reset-delay controller that senses the input voltage magnitude and adjusts the end of each charge mode by a time inversely proportional to the input voltage, compensating for negative inductor currents to reduce total harmonic distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage-mode control is used to control the PFC converter, then the power factor is improved, but total harmonic distortion of input current increases above acceptable limits
Solution Approach 1:
The patent applies preliminary action by delaying the end of the charge mode beyond the assertion of the initial-reset signal. This delay compensates for the negative inductor current that occurs at the beginning of each charge mode, preventing the harmful harmonic distortion before it fully develops while maintaining the power factor correction benefit
Solution Approach 2:
The patent changes the timing parameter of the charge mode duration by introducing a compensated time delay. This parameter adjustment is inversely proportional to the magnitude of the input voltage, dynamically optimizing the charge mode duration to reduce harmonic distortion while maintaining effective power factor correction
2Device complexity
If the charge mode is ended immediately upon assertion of the initial-reset signal, then the control simplicity is maintained, but negative inductor currents cause harmonic distortion
Solution Approach 1:
The patent performs a preliminary extension of the charge mode beyond the initial-reset signal assertion. This preliminary action accounts for the anticipated negative inductor current and prevents harmonic distortion without requiring complex real-time adjustments during the charge mode
Solution Approach 2:
The patent implements feedback by using the input voltage magnitude to dynamically adjust the compensated time delay. The controller senses the input voltage and adjusts the charge mode duration accordingly, creating a closed-loop system that automatically optimizes performance without excessive complexity
Data Source
AI summary
Reducing total harmonic distortion of power-factor correction switching converters. At least one example is a method of operating a power-factor-correction (PFC) converter, the method comprising: charging an inductance of the PFC converter, thereby creating a charge mode; asserting, during the charge mode, an initial-reset signal by a reset circuit implementing voltage-mode control; ending the charge mode a compensated time after assertion of the initial-reset signal, the compensated time inversely proportional to a magnitude of an input voltage of the PFC converter; and then discharging the inductance of the PFC converter.


