Power Factor Correction Circuit Control for Multi-Functional Peripheral Return Time
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Solution Overview
Problem
Existing multi-functional peripherals face inefficiencies in returning from a power-saving state to normal operation due to delays in activating the DC/DC converter, leading to increased return time and power wastage.
Innovation Solution
An information processing apparatus with a power supply unit and control unit that includes an ON/OFF switchable power factor correction circuit, where the power supply control unit determines whether to turn on the PFC based on the cause of return from the power-saving state, optimizing power supply to the load and reducing unnecessary delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the PFC circuit is turned off in power-saving mode to reduce power consumption, then power consumption is reduced, but the return time from power-saving state increases due to delay in activating the DC/DC converter
Solution Approach 1:
The patent applies dynamics by making the PFC circuit's operational state adjustable based on the return cause. The control unit dynamically determines whether to turn on or off the PFC circuit when returning from power-saving state, depending on whether the return cause requires high power consumption (normal mode) or low power consumption (partial mode). This dynamic adaptation resolves the contradiction between power saving and return time by optimizing the PFC circuit's state according to actual needs.
Solution Approach 2:
The patent changes the operational parameter of the PFC circuit (on/off state) based on the return cause. By detecting the return cause and selectively controlling the PFC circuit's state, the system adjusts power consumption parameters to match the required performance level, thereby resolving the trade-off between power saving and return time.
2Reliability
If a delay signal is generated to activate the DC/DC converter after the PFC circuit is stabilized, then stable power supply output is achieved, but the return time from power-saving state is unnecessarily extended
Solution Approach 1:
The patent makes the delay signal generation dynamic based on the return cause. The control unit selectively generates or skips the delay signal depending on whether the return requires normal mode (high power) or partial mode (low power). This dynamic approach maintains reliable power supply when needed while avoiding unnecessary delays when the full power is not required, thus resolving the contradiction between reliability and return time.
Solution Approach 2:
The patent changes the timing parameter of the DC/DC converter activation by conditionally generating the delay signal. When the return cause indicates normal mode is needed, the delay signal is generated to ensure stable power supply. When partial mode is sufficient, the delay is skipped, reducing return time. This parameter adjustment resolves the trade-off between power supply stability and return time.
3Power
If the PFC circuit is turned on without fail upon return to normal mode, then adequate power supply is ensured, but power consumption cannot be optimized for partial mode returns
Solution Approach 1:
The patent applies dynamics by making the PFC circuit's operational state dependent on the return cause. Instead of always turning on the PFC circuit upon return, the control unit dynamically decides whether to activate it based on whether the return is to normal mode (requiring full power) or partial mode (requiring reduced power). This dynamic control ensures adequate power supply when needed while optimizing power consumption for partial returns.
Solution Approach 2:
The patent changes the operational parameter of the PFC circuit (on/off state) based on the detected return cause. By selectively controlling the PFC circuit's state, the system adjusts power consumption to match the required power level, ensuring adequate power supply for normal mode returns while reducing power consumption for partial mode returns.
4Loss of time
If the DC/DC converter is activated immediately upon return from power-saving state, then return time is reduced, but power supply stability may be compromised
Solution Approach 1:
The patent makes the DC/DC converter activation dynamic by conditionally generating the delay signal based on the return cause. When normal mode return is detected, the delay signal is generated to ensure stable power supply. When partial mode return is detected, the delay is skipped for faster activation. This dynamic approach balances return time and power supply stability based on actual requirements.
Solution Approach 2:
The patent adjusts the timing parameter of DC/DC converter activation by selectively generating the delay signal. The delay duration is changed from present (when normal mode is required) to absent (when partial mode is sufficient), optimizing the balance between return time and power supply stability based on the return cause.
Data Source
AI summary
A power supply control unit in a power supply unit in a multi-functional peripheral turns off a PFC unit in a power-saving mode. If a return to a normal mode occurs, whether the PFC unit is to be turned on or not is controlled based on a cause of the return to the normal mode. If the PFC unit is not to be turned on or already has an ON state based on the occurrence of the return, the power supply control unit immediately causes power supply unit to start power supply based on the cause of return. If the PFC unit is turned on based on the occurrence of the return, the power supply control unit causes the power supply unit to start power supply based on the cause of return after a lapse of a delay time from the turning on of the PFC unit.