Power Factor Improvement Circuit Topology for Loss Reduction
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Solution Overview
Problem
Conventional power factor improvement circuits face significant losses and high common-mode noise, particularly in the bridge circuit, which affects efficiency and circuit size, and existing solutions either increase circuit size or limit switching operation due to parasitic diode recovery issues.
Innovation Solution
A power factor improvement circuit design featuring a series connection of switching and rectifying elements, an inductor, and capacitors, which reduces diode loss and common-mode noise while maintaining a compact size, and allows for parallel configuration to enhance current and power output, with optional diode inclusion for control flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a conventional bridge circuit is used for power factor improvement, then the circuit can convert AC input voltage to DC voltage, but the loss in the bridge circuit accounts for a large percentage among losses of main components
Solution Approach 1:
The patent extracts and eliminates the bridge circuit from the power factor improvement topology. By using a direct AC input connection with switching elements and rectifying elements connected to the capacitor, the design removes the inefficient bridge circuit configuration while maintaining the power factor improvement function, thereby significantly reducing bridge circuit losses.
Solution Approach 2:
The patent segments the power factor improvement function into separate switching elements and rectifying elements that operate during different half-cycles of the AC input. This segmentation allows each component to be optimized for its specific operation mode, reducing overall losses compared to the conventional bridge circuit approach.
2Loss of energy
If diodes are reduced in number to improve efficiency, then circuit efficiency increases, but common-mode noise becomes large
Solution Approach 1:
The patent introduces an intermediary inductor connected between the AC input and the switching elements. This inductor acts as a mediator that suppresses common-mode noise while allowing the circuit to operate with reduced diode usage, thus maintaining both high efficiency and low noise performance.
Solution Approach 2:
The patent changes the operational parameters by using switching elements with controlled switching timing rather than relying solely on passive diodes. By controlling when switching elements conduct during AC half-cycles, the circuit achieves efficient operation with reduced common-mode noise emission.
3Device complexity
If parasitic diodes of switching elements are used for rectification, then the circuit can operate with fewer components, but the switching operation is limited to discontinuous current mode due to recovery problems
Solution Approach 1:
The patent applies preliminary action by ensuring that one switching element is fully turned off before the other switching element turns on. This timing control prevents simultaneous conduction and allows the inductor current to continue flowing, enabling continuous current mode operation while using only the parasitic diodes of the switching elements for rectification.
Solution Approach 2:
The patent introduces dynamic control of switching element timing to manage the transition between half-cycles. By dynamically adjusting the switching sequence and ensuring proper overlap or gap timing, the circuit achieves continuous current mode operation with simplified component usage, adapting the operation to avoid parasitic diode recovery issues.
4Object-generated harmful factors
If two inductor elements are used to solve common-mode noise problem, then common-mode noise is reduced, but the size of the circuit becomes large
Solution Approach 1:
The patent merges the common-mode noise suppression function into a single inductor element that is shared between both switching elements. This single inductor performs the noise suppression role that would otherwise require two separate inductors, thereby reducing circuit size while maintaining effective common-mode noise reduction.
5Object-generated harmful factors
If a transformer is used to solve common-mode noise problem, then common-mode noise is reduced, but the size of the circuit becomes large
Solution Approach 1:
The patent extracts and eliminates the transformer from the circuit topology. By using a different approach with switching element timing control and a single shared inductor, the design achieves common-mode noise suppression without requiring a transformer, thereby significantly reducing circuit size.
6Loss of energy
If switching elements are used to reduce bridge circuit loss, then efficiency improves, but the driving ground node becomes unstable and common-mode noise occurs
Solution Approach 1:
The patent applies preliminary action by ensuring that one switching element is completely turned off before the other switching element is activated. This timing control prevents simultaneous switching events that would cause ground node instability and common-mode noise, while still allowing switching elements to be used for efficient power factor improvement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed circuit design effectively reduces diode loss and common-mode noise, enabling high-efficiency power factor improvement with a smaller footprint, supports large current and power output, and improves the stability of the driving circuit's ground potential, while allowing for flexible switching element control.
Implementation Method 1
an inductor element L1 connected between a terminal, which is on the other side of the first node, of the first switching element S1 and a terminal, which is on the other side of the second node, of the second switching element S2
Implementation Method 2
a first rectifying element D4 and a second rectifying element D3 respectively connected in series with the first switching element S1 and the second switching element S2
Implementation Method 3
a capacitor element C1 connected between other terminals, which are opposite to the nodes, of the first rectifying element D4 and the second rectifying element D3 and an output terminal 'out'
Data Source
AI summary
A power factor improvement circuit is configured with two series circuits each having a switching element and a rectifying element connected in series. Two input terminals of a single-phase AC power source are respectively connected between the switching elements and the rectifying elements in the series circuits. An inductor element is connected between an output terminal of the power factor improvement circuit and two terminals, which are on the other side of the rectifying elements, of the switching elements. A capacitor element is connected between the output terminal and the two terminals. According to the above configuration, it is possible to decrease a loss of a bridge circuit and common-mode noise, and to provide a power factor improvement circuit in a smaller size.


