PFC Circuit Clamping Capacitor Zero Turn-Off Loss
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Solution Overview
Problem
Conventional power factor correction (PFC) circuits face challenges in achieving zero turn-off loss and low switching losses while maintaining efficiency and reducing component count, leading to increased costs and complexity.
Innovation Solution
The proposed PFC circuit incorporates a power factor inductor, a main switch that periodically connects to ground, and a clamping capacitor to provide zero turn-off loss and low voltage switching, along with a choke inductor and auxiliary switch to minimize component count and switching losses, utilizing lower current Silicon Carbide diodes and a single snubber circuit for both zero voltage switching (ZVS) and zero turn-off functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional PFC circuits use traditional switching components and circuits, then the circuit can achieve basic power factor correction, but the turn-off loss and switching losses are high, reducing efficiency
Solution Approach 1:
The patent changes the voltage parameter across the main switch by introducing a clamping capacitor that maintains a constant voltage during switch turn-off. This parameter change eliminates turn-off loss by ensuring the switch turns off at zero voltage, while the simple capacitor implementation keeps the added complexity minimal
Solution Approach 2:
The clamping capacitor acts as an intermediary element between the power factor inductor and the main switch. It mediates the voltage transfer, storing energy during the switch on-time and releasing it during turn-off, thereby enabling zero turn-off loss without requiring complex control circuits
2Loss of energy
If PFC circuits use more components to achieve zero turn-off loss and low switching losses, then efficiency improves, but component count and cost increase
Solution Approach 1:
The clamping capacitor serves multiple functions: it provides zero turn-off voltage for the main switch, enables low voltage switching for reduced switching losses, and works with the auxiliary switch to provide zero voltage switching. This multi-functionality achieves multiple efficiency improvements with a single component addition
Solution Approach 2:
The patent merges the zero turn-off loss function and zero voltage switching function into a single clamping capacitor circuit that works with the auxiliary switch. This consolidation achieves both efficiency improvements simultaneously without requiring separate circuits for each function
3Power
If PFC circuits use higher current components to handle power, then power capacity increases, but component cost and complexity increase
Solution Approach 1:
The patent segments the current handling function between the main switch and the auxiliary switch. The auxiliary switch handles only the capacitor discharge current which is significantly lower than the main power current, allowing the use of lower current rated components for the auxiliary switch while maintaining overall power capacity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves improved efficiency with reduced component count, lower currents, and faster switching frequencies without switching loss penalties, enabling the use of lower Rdson and lower-cost Silicon Carbide diodes, while providing zero turn-off and ZVS for both main and auxiliary switches.
Implementation Method 1
a clamping capacitor coupled to the power factor inductor and configured to provide zero turn-off loss for the main switch
Implementation Method 2
a main switch configured to periodically connect the power factor inductor to the ground terminal
Implementation Method 3
a power factor inductor coupled in series between the positive input terminal and the output terminal
Data Source
AI summary
The disclosure provides a power factor correcting (PFC) circuit, a power supply and a method of manufacturing a power converter. In one embodiment, the PFC circuit has a positive input terminal, an output terminal and a ground terminal and includes: (1) a power factor inductor coupled in series between the positive input terminal and the output terminal, (2) a main switch configured to periodically connect the power factor inductor to the ground terminal and (3) a clamping capacitor coupled to the power factor inductor and configured to provide zero turn-off loss for the main switch.