PFC Control Circuit Dynamic Mode Switching for Light Load Efficiency
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Solution Overview
Problem
Existing power factor correction (PFC) circuits face challenges in maintaining high efficiency at light loads, particularly when operating in a two-phase mode, as the operating frequency increases, leading to uncontrollable regions and increased switching losses, and the switching point between single-phase and two-phase operation modes cannot be freely set above 50% of maximum output power.
Innovation Solution
A control circuit for a PFC circuit with two or more channels, including switching transistors, inductors, and rectification elements, that uses an error amplifier, pulse modulator, and mode controller to switch between modes, allowing for a phase difference of 180° or 360°/M, and employs a sense resistor to detect load states and distribute heat generation across multiple channels, enabling the suppression of operating frequency increases and flexible switching point settings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a PFC circuit operates in two-phase mode at light loads, then the power factor can be maintained, but the operating frequency increases uncontrollably and switching losses increase
Solution Approach 1:
The patent implements dynamic mode switching between two-phase and single-phase operation based on load conditions. The control circuit automatically transitions from two-phase mode at heavy loads to single-phase mode at light loads, dynamically adapting the operating frequency and phase configuration to minimize switching losses while maintaining power factor correction effectiveness across the full load range
Solution Approach 2:
The patent changes the operating parameters (number of active phases, switching frequency) based on load conditions. At light loads, it reduces the number of active phases from two to one and adjusts the switching frequency to a lower, more efficient range, thereby reducing switching losses while maintaining adequate power factor correction performance
2Temperature
If a PFC circuit operates in two-phase mode, then heat generation increases, but heat distribution becomes less efficient
Solution Approach 1:
The patent segments the PFC operation into distinct phases that can be independently controlled. By dividing the two-phase operation into selectable single-phase modes, the system can distribute heat generation more effectively across different time periods and reduce thermal concentration in any single component, improving overall heat management efficiency
3Ease of operation
If the switching point between single-phase and two-phase modes is fixed at 50% of maximum output power, then control is simplified, but flexibility in optimizing performance is reduced
Solution Approach 1:
The patent implements dynamic mode switching between two-phase and single-phase operation based on load conditions. The control circuit automatically transitions from two-phase mode at heavy loads to single-phase mode at light loads, dynamically adapting the operating frequency and phase configuration to minimize switching losses while maintaining power factor correction effectiveness across the full load range
Solution Approach 2:
The patent changes the operating parameters (number of active phases, switching frequency) based on load conditions. At light loads, it reduces the number of active phases from two to one and adjusts the switching frequency to a lower, more efficient range, thereby reducing switching losses while maintaining adequate power factor correction performance
Data Source
AI summary
A control circuit of a power factor correction circuit including two channels, each of which includes a switching transistor, an inductor and a rectification element, includes: an error amplifier amplifying an error of a feedback signal according to output voltage of the power factor correction circuit and target value of the feedback signal and generating an error signal; a pulse modulator generating first and second pulse modulated signals in current critical mode in response to the error signal; a first driver driving the switching transistor of first channel based on the first pulse modulated signal; and a second driver driving the switching transistor of second channel based on the second pulse modulated signal, wherein the pulse modulator switches between a first mode where phase difference between the first and second pulse modulated signals is 180° and a second mode where the first and second channels are exclusively and alternately used.


