PFC Driver Circuit With Supply-Offset Synchronization
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Solution Overview
Problem
Existing driver arrangements with power factor correction circuitry suffer from high material and space requirements due to double-stage converting circuitry, and switched-mode power supplies experience significant power loss and inefficiency due to out-of-phase supply and offset signals, especially when powering low voltage LED modules.
Innovation Solution
A driver arrangement with an adjustment circuit that synchronizes the supply voltage with the offset signal produced by the switched-mode power supply, reducing power loss by adjusting the voltage amplitude and phase to match the offset signal, thereby enhancing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If double-stage converting circuitry is used to regulate PFC output signal, then output signal stability is improved, but material cost and space requirements increase
Solution Approach 1:
The patent divides the conversion process into two functional stages: PFC circuitry for power factor correction and a separate switching converting circuitry for ripple compensation. This segmentation allows each stage to be optimized independently, reducing overall complexity while maintaining stability.
Solution Approach 2:
Instead of regulating the entire PFC output signal, the switching converting circuitry only compensates for the AC ripple component. This partial action approach reduces the power rating requirements and component size while achieving the desired output stability.
2Device complexity
If switching converting circuitry is used to compensate AC component, then power rating and cost are reduced, but power loss increases due to out-of-phase signals
Solution Approach 1:
The patent introduces a preliminary adjustment stage that modifies the supply voltage waveform before it enters the switching converting circuitry. This preliminary action ensures the supply voltage is in-phase with the offset signal, preventing energy loss in subsequent conversion stages.
Solution Approach 2:
The system uses feedback from the PFC output signal to adjust the supply voltage waveform. By sensing the ripple characteristics and adjusting the supply voltage accordingly, the system maintains optimal phase alignment and minimizes power loss dynamically.
3Adaptability or versatility
If supply voltage amplitude is reduced for low voltage LED modules, then adaptability is improved, but power loss in switched-mode power supply increases
Solution Approach 1:
The adjustment circuit performs preliminary waveform shaping on the supply voltage to ensure it is in-phase with the offset signal before conversion. This preliminary action allows the system to operate efficiently even when the voltage amplitude is reduced for low-voltage LED modules.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The synchronization of supply voltage with the offset signal significantly reduces power loss in the switched-mode power supply, improving the overall efficiency of the driver arrangement.
Implementation Method 1
a switched-mode power supply arranged to convert a supply voltage into an offset signal to superimpose on the PFC output signal, to compensate for the AC mains power ripple
Implementation Method 2
An adjustment circuit is configured to adjust the supply voltage to be in-synchronization with an offset signal produced by the switched-mode power supply, so as to reduce power loss
Data Source
AI summary
A mechanism for controlling a supply voltage for a switched-mode power supply designed for compensating an AC mains power ripple in a PFC output signal produced by a power factor converter. An adjustment circuit is used to synchronize the amplitude of the supply voltage with the amplitude of an offset signal generated by the switched-mode power supply used to compensate for the AC mains power ripple in the PFC output signal. Said synchronizing regulates the difference between the voltage amplitude of the adjusted supply voltage and the voltage amplitude of the offset signal, thereby controlling the power loss of the switched-mode power supply.