Single Stage PFC Feedback Circuit for LED Drivers
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Solution Overview
Problem
Power converters with single stage Power Factor Correction (PFC) architecture face issues with high output ripple, which can overdrive feedback networks and degrade reliability, and slow response times that lead to excessive currents and potential damage to LED loads, while two-stage PFC architectures are inefficient and costly.
Innovation Solution
A feedback method and circuit that compares a voltage signal with a reference signal to generate a comparison signal, which is clamped to form a clipped signal used to generate a control signal for a single stage PFC modulation circuit, ensuring a high power factor without ripple or time delays, using a current sense circuit, comparator, scaling, and compensation stages to form a control loop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single stage PFC architecture is used, then the number of components is reduced and processing efficiency is improved, but output ripple increases which can overdrive feedback networks and degrade reliability
Solution Approach 1:
The patent introduces an intermediary feedback network that couples between the PFC stage and the LED driver stage. This feedback network includes a feedback capacitor and feedback resistor that form a voltage divider, acting as a mediator to transfer the output voltage information back to the PFC control circuit. The intermediary feedback network isolates the PFC stage from the high-ripple output conditions, preventing overdrive conditions while maintaining the single-stage architecture's simplicity and efficiency advantages.
2Stability of the object's composition
If a large capacitance filtering capacitor is coupled to the output filter network, then output ripple is smoothed out, but response time of the control loop slows down resulting in excessive current
Solution Approach 1:
The patent implements a feedback mechanism where the feedback network couples the output voltage back to the PFC control circuit. This feedback allows the control loop to respond rapidly to changes in output conditions by continuously monitoring the output voltage and adjusting the PFC stage accordingly. The feedback approach eliminates the need for large filtering capacitors while maintaining output stability and achieving fast response times, preventing excessive current conditions.
3Stability of the object's composition
If the response time of the LED current feedback signal is slowed to minimize phase delay, then stable operating conditions are maintained, but the circuit cannot respond to changing power line conditions and excessive current occurs
Solution Approach 1:
The patent applies preliminary action by implementing feedforward control through the feedback network that anticipates and responds to power line conditions before they cause excessive current. The feedback capacitor and resistor network pre-condition the control signal, allowing the circuit to adapt rapidly to changing power line conditions while maintaining stable LED operation. This preliminary action enables the system to respond proactively rather than reactively, preventing excessive current before it occurs.
4Manufacturing precision
If a two-stage PFC architecture is used, then each power stage can be optimized, but a large number of components are used and power is processed twice reducing efficiency
Solution Approach 1:
The patent merges the PFC stage and LED driver stage into a single integrated circuit, combining multiple power processing functions into one unified stage. The feedback network enables this merged architecture to maintain the optimization benefits of separate stages while eliminating the inefficiencies of dual processing. By integrating the PFC control circuit, LED driver circuit, and feedback network into a single chip, the patent achieves both stage optimization and processing efficiency simultaneously, avoiding the component proliferation and energy loss associated with two-stage architectures.
Data Source
AI summary
A method and circuit for controlling feedback in, for example, a power factor converter circuit. A current sense signal is compared with a reference signal to generate a comparison signal. A clipped signal is generated from the comparison signal where the signal is a periodic waveform that transitions between two levels that are symmetrically positioned about a reference signal. The clipped signal is used to generate a summed signal at the input of an integrator. The integrator generates a feedback signal suitable for use in, for example, a power factor converter circuit.