Power Factor Correction Circuit with Frequency Jittering for EMI Reduction
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Solution Overview
Problem
Conventional AC/DC power supplies face increased PCB size and cost due to the placement of EMI filters before full-bridge rectifiers, and existing frequency jittering techniques require specialized chips, leading to higher costs and reduced integration and miniaturization.
Innovation Solution
A power factor correction circuit employing a frequency jittering technique with a mediate signal generator and current modulation circuit to control a power switch with a variable frequency, ensuring inductor current is in phase with sinusoidal half-wave voltage, thereby reducing electromagnetic interference and facilitating integration and miniaturization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If an EMI filter is arranged in front of the full-bridge rectifier, then electromagnetic interference is reduced, but the PCB size and cost increase
Solution Approach 1:
The patent extracts the EMI filter from its conventional position before the full-bridge rectifier and relocates it to after the power factor correction circuit. This repositioning allows the filter to handle already-corrected power factor currents, reducing its size requirements and enabling smaller PCB layout while maintaining EMI reduction effectiveness.
Solution Approach 2:
The patent employs dynamic frequency jittering technique where the switching frequency of the power factor correction circuit is continuously varied within a range. This dynamic frequency variation prevents harmonic resonance and reduces electromagnetic interference without requiring large filter components, thereby reducing PCB size.
2Object-affected harmful factors
If an EMI filter is arranged in front of the full-bridge rectifier, then electromagnetic interference is reduced, but the cost increases
Solution Approach 1:
The patent extracts the EMI filter from its conventional position and relocates it to after the power factor correction circuit. This repositioning allows the use of smaller, less expensive filter components since they only need to filter residual harmonics from the already corrected power factor current, rather than handling full rectifier currents.
Solution Approach 2:
The dynamic frequency jittering technique reduces the requirements for expensive passive filter components by actively managing harmonic content through frequency variation, thereby reducing overall system cost while maintaining EMI reduction performance.
3Object-affected harmful factors
If frequency jittering technique is employed with specialized chips, then electromagnetic interference is reduced, but the cost increases and integration is reduced
Solution Approach 1:
The patent merges the frequency jittering control function directly into the power factor correction circuit's existing control architecture. The control circuit generates variable frequency drive signals that simultaneously achieve power factor correction and frequency jittering for EMI reduction, eliminating the need for separate specialized chips and improving integration.
Solution Approach 2:
The control circuit is designed to perform multiple functions: power factor correction, frequency jittering for EMI reduction, and switch timing control. This multi-functional approach eliminates the need for dedicated specialized chips, reducing cost and improving integration while maintaining effective EMI reduction.
Data Source
AI summary
The present invention relates to a power factor correction circuit, that can include: an inductor current detector that generates a sampling voltage signal, and sinusoidal half-wave current and voltage signals based on the sampling voltage signal; a mediate signal generator generating slope voltage and clock signals in response to the sinusoidal half-wave voltage signal, where a frequency of each varies with the sinusoidal half-wave voltage signal; a current modulation circuit receiving the sinusoidal half-wave current signal and a voltage feedback signal representative of a power stage output voltage to generate a regulation signal that is compared against the slope voltage signal to generate a modulation signal; and a logic/driving circuit receiving the modulation and clock signals, and generating a controlling signal that controls a power switch with variable frequency to maintain the inductor current in phase with the sinusoidal half-wave voltage signal and the power stage output voltage constant.