PFC Control Circuit Offset Compensation for Low THD Response
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Solution Overview
Problem
Conventional semiconductor integrated circuit devices face issues with high total harmonic distortion (THD) in AC input current, leading to poor load responsiveness and increased costs due to higher capacitance and resistance values required to mitigate these issues.
Innovation Solution
A control circuit for a power factor improvement circuit with a DC/DC converter is configured with an input voltage detection terminal, an error amplifier circuit, an arithmetic circuit that adds an offset voltage, a comparator, and a drive circuit to manage the switching transistor, thereby reducing THD and improving load responsiveness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional power factor improvement circuit is used, then power factor is maintained at approximately 1, but total harmonic distortion (THD) of AC input current becomes large
Solution Approach 1:
The control circuit performs preliminary actions by detecting the AC input voltage phase and proactively adjusting the switching transistor gate signal phase to align with it. This preemptive synchronization prevents harmonic distortion before it occurs, rather than reacting to THD problems after they arise.
Solution Approach 2:
The control circuit implements feedback by continuously monitoring the AC input voltage and using this information to adjust the switching transistor operation. The detection of voltage phase and the subsequent adjustment of current phase create a closed-loop system that maintains power factor while minimizing harmonics.
2Productivity
If capacitance and resistance values are increased to mitigate THD issues, then load responsiveness improves, but component cost increases
Solution Approach 1:
Instead of changing component values (capacitance and resistance), the invention changes the operational parameters of the control circuit - specifically the phase detection and timing of the gate signal. This parameter-based control achieves load responsiveness without requiring expensive high-value components.
Solution Approach 2:
The invention replaces the passive component-based approach (relying on physical capacitance and resistance values) with an active control system using electronic phase detection and timing control. This substitution eliminates the need for large, costly passive components while achieving the same performance goals.
3Power
If switching transistor operates continuously, then output voltage is maintained, but power consumption increases during standby state
Solution Approach 1:
The control circuit dynamically adjusts its operation based on load conditions. During standby state, it reduces switching activity and power consumption while maintaining the ability to quickly restore full output voltage when load demands increase, creating a dynamic response that balances power maintenance with energy efficiency.
Data Source
AI summary
The present disclosure provides a power factor improvement circuit with a DC/DC converter including an arithmetic circuit. A first voltage having a full-wave rectified waveform is received by an input voltage detection terminal of the power factor improvement circuit. A second voltage is generated by amplifying an error between a first detection voltage and a reference voltage according to an output voltage of the DC/DC converter. A third voltage is generated by multiplying the first voltage by the second voltage. The arithmetic circuit adds an offset voltage to a third voltage to generate a fourth voltage. A comparator is configured to compare a second detection voltage with the fourth voltage. A drive circuit is configured to turn on/off drive of the switching transistor according to an output of the comparator. When the second detection voltage is higher than the fourth voltage, the switching transistor is turned off.