Interleaved PFC Overcurrent Protection Circuit

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Solution Overview

Problem

Interleaved Power Factor Correction (PFC) stages in power supplies face inefficiencies due to uneven current distribution during overcurrent events, leading to prolonged startup times and poor current conduction, as both MOSFETs are turned off simultaneously when the total current exceeds the reference limit, regardless of the phase-specific current loads.

Innovation Solution

An overcurrent protection circuit that includes a current sense circuit, a current limit reference, and a gain stage to adjust the conduction times of MOSFETs based on the excess current, ensuring more equitable current sharing between interleaved PFC branches by injecting a current shift proportional to the excess current, thereby controlling the PWM latches to manage MOSFET conduction times effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If both MOSFETs are turned off simultaneously when total current exceeds the reference limit, then overcurrent protection is provided, but current sharing becomes unbalanced and operational efficiency deteriorates

Engineering Contradiction:
Improveovercurrent protectionVSAvoidoperational efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by providing individual overcurrent protection for each MOSFET in the interleaved PFC stage. Instead of a single global protection mechanism, each current branch has its own protection circuit that independently monitors and protects its MOSFET. This allows asymmetric current distribution to be handled appropriately - each branch is protected based on its own current conditions rather than being constrained by the other branch's state, thereby maintaining operational efficiency while ensuring reliability.

Inventive Principle:
Principle #3Local quality

2Device complexity

If a single current sense input/output pin is used to sense total current, then circuit complexity is reduced, but current distribution between phases becomes unbalanced during overcurrent events

Engineering Contradiction:
Improvecircuit complexityVSAvoidcurrent conduction
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent applies segmentation by dividing the current sensing function into separate sensing circuits for each current branch. Instead of using a single sense pin to measure total current, the system implements individual current sensing for each MOSFET branch. This segmentation allows the control system to independently monitor and manage current distribution in each phase, preventing the current imbalance problem that occurs with a single shared sense pin, while the segmented protection signals are then integrated to control the MOSFETs appropriately.

Inventive Principle:
Principle #1Segmentation

3Reliability

If one MOSFET conducts most of the current while the other conducts almost zero current during overcurrent detection, then MOSFET protection is achieved, but power supply startup time increases and current conduction deteriorates

Engineering Contradiction:
ImproveMOSFET protectionVSAvoidstartup time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies dynamics by implementing dynamic, independent control of each MOSFET based on real-time current conditions in its respective branch. Rather than using a static global shutdown approach where both MOSFETs are turned off simultaneously regardless of individual branch conditions, the system dynamically adjusts each MOSFET's conduction state based on its own overcurrent detection. This dynamic per-branch control prevents unnecessary shutdowns of healthy branches during localized overcurrent events, thereby reducing startup time and maintaining better current conduction while still providing adequate protection.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8830644B2Method for providing over current protection and circuit
Publication Date: 2014.09.09 SEMICON COMPONENTS IND LLC
  • US8830644B2 patent drawing
  • US8830644B2 patent drawing
  • US8830644B2 patent drawing

AI summary

A method and circuit for protecting against an over current condition. A conduction time of one or more transistors is reduced during the over current condition. The conduction time is reduced in an amount that is an increasing function of the amount of the over current. The conduction time may be reduced proportionally to the excess current.