Single-Stage Power Converter Phase Delay for EMI Compensation
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Solution Overview
Problem
Existing single-stage power converters face challenges in maintaining high power factor (PF) and low total harmonic distortion (THD) when operating with high line voltage and low output power, due to the negative impact of electromagnetic interference (EMI) capacitors, which are not adequately addressed by current solutions.
Innovation Solution
Introducing a phase delay between the peak current command and the rectified input voltage using a combination of a resistor and a capacitor, or employing an adjustable analog-to-digital converter, analog low-pass filter, or digital low-pass filter within the controller to lag the transformer current behind the rectified input voltage, thereby compensating for the effects of EMI capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If EMI capacitors are used in single-stage power converters, then electromagnetic interference is reduced, but signal distortion increases and power factor decreases at low output power levels
Solution Approach 1:
The patent introduces an intermediary RC circuit between the EMI capacitors and the control system. This RC circuit acts as a mediator that filters out the signal distortion caused by EMI capacitors while allowing the beneficial EMI filtering function to operate. The resistor and capacitor create a time constant that selectively attenuates the high-frequency distortion signals while passing the lower frequency power signal components.
Solution Approach 2:
The patent replaces the traditional mechanical/electrical direct connection between EMI capacitors and the power conversion circuit with an electronic filtering approach using RC circuits. This substitution allows the system to maintain the EMI filtering function while electronically removing the harmful signal distortion through the frequency-selective properties of the RC filter.
2Productivity
If conventional PFC control is used, then high power factor is achieved at high load conditions, but power factor and THD specifications cannot be met at low load operating conditions
Solution Approach 1:
The patent implements dynamic control by making the PFC control parameters adaptive to the operating conditions. The RC circuit time constants and control loop gains are designed to vary with the output power level, allowing the system to automatically adjust its behavior to maintain high power factor and low THD across the entire operating range from high load to low load conditions.
Solution Approach 2:
The patent changes the control parameters dynamically based on operating conditions. By modifying the RC circuit time constants and control loop parameters according to the load level, the system maintains optimal power factor correction performance across varying operating conditions, transitioning from high load to low load operation without sacrificing PF or THD specifications.
3Ease of operation
If phase-locked loop control is used to synchronize with input voltage, then power factor is improved, but EMI capacitor signal distortion is not compensated
Solution Approach 1:
The patent introduces an RC circuit as an intermediary between the phase-locked loop control and the EMI capacitors. This intermediary circuit provides the synchronization function through the PLL while simultaneously filtering out the signal distortion generated by the EMI capacitors, achieving both goals without conflict.
Solution Approach 2:
The patent replaces the direct coupling between the PLL control system and the EMI capacitor effects with an electronic filtering stage. This substitution allows the PLL to maintain synchronization with the input voltage while the RC filter electronically removes the harmful signal distortion, separating the useful synchronization function from the harmful distortion effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively maintains a high power factor and low THD even at low output power levels, improving the operational performance of single-stage power converters across a wide range of input voltages.
Implementation Method 1
providing, by a combination of a resistor and a capacitor within a single-stage power converter, a delay in phase between a peak current command and a rectified input voltage such that a phase of a transformer current intentionally lags behind a phase of the rectified input voltage
Implementation Method 2
the EMI capacitors create signal distortion, thereby increasing the THD and decreasing the PF
Data Source
AI summary
Systems, methods, and apparatus for a circuit with power factor correction (PFC) are disclosed. In one or more embodiments, the disclosed method comprises providing, by a single-stage power converter, a delay in phase between a peak current command and a rectified input voltage such that a phase of a transformer current intentionally lags behind a phase of the rectified input voltage to maintain a power factor (PF) level and a total harmonic distortion (THD) level for the single-stage power converter. In one or more analog embodiments, a resistor and a capacitor are implemented into a conventional single-stage power converter to provide the delay in phase between the peak current command and the rectified input voltage. In one or more digital embodiments, a controller within a conventional single-stage power converter exclusively provides the delay in phase between the peak current command and the rectified input voltage.