Three-Level PFC Rectifier Burst Control for Switch Voltage Stress

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Solution Overview

Problem

Three-level power factor rectifiers experience high voltage stress on power switching components during light-load or no-load conditions due to parasitic capacitance, leading to increased circuit size and cost when using higher specification components to mitigate this issue.

Innovation Solution

A three-level power factor rectifier design incorporating a diode bridge arm, bridge arm assembly, input inductor, and capacitor bank, operated in a burst mode with specific switch control to maintain an input inductor demagnetized state, allowing the use of appropriately rated switches to reduce voltage stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If higher specification power switching components are used to withstand high voltage stress, then the voltage stress problem is solved, but the circuit volume and cost increase

Engineering Contradiction:
Improvevoltage stress withstanding capabilityVSAvoidcircuit volume and cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by turning on the second and third switches for a specific time period when entering the burst period from the burst sleep period. This preliminary switching action ensures that the input inductor is already demagnetized before normal burst mode operation begins, preventing voltage exceedance on power switching components during light-load or no-load conditions. This eliminates the need to use higher specification components with larger circuit volume and higher cost.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the input inductor stores energy during burst sleep period, then the rectifier can quickly respond to load changes, but voltage stress exceeds switch component ratings during transition

Engineering Contradiction:
Improveresponse speed to load changesVSAvoidvoltage stress on switching components
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent converts the potentially harmful effect of stored energy in the input inductor during burst sleep period into a beneficial feature. By implementing a specific switching sequence where the second and third switches are turned on for a specific time period when entering the burst period, the stored energy is safely discharged through the capacitor bank, preventing voltage exceedance. This allows the system to maintain fast response capability while avoiding harmful voltage stress on switching components.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Loss of energy

If the rectifier operates in continuous conduction mode, then smooth power conversion is achieved, but power loss increases during light-load operation

Engineering Contradiction:
Improvepower loss during light-load operationVSAvoidsmooth power conversion
Core Design Contradiction:
Loss of energyVSStability of the object's composition

Solution Approach 1:

The patent implements periodic action by operating the rectifier in burst mode, which consists of alternating burst periods and burst sleep periods. During light-load or no-load conditions, the rectifier enters burst sleep period to reduce power loss, and only activates during brief burst periods when needed. The controller manages the switching between these periodic states, allowing the input inductor to be demagnetized during burst sleep period to minimize energy loss while maintaining the ability to provide smooth power conversion when in burst period.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Reduces voltage stress on switches, minimizing component specifications and circuit cost by maintaining the input inductor in a demagnetized state during burst mode operations.

Implementation Method 1

the power switching component is affected by parasitic capacitance at the moment of conduction thereof, and the medium-voltage AC power is easily attached to both ends of the power switching component, resulting in the generation of instantaneous high voltage

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Implementation Method 2

The controller operates the first bridge arm in a burst mode, and the burst mode includes a burst period and a burst sleep period. When entering the burst period from the burst sleep period, the controller turns on the second switch and the third switch for a specific time period

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Data Source

PatentUS12609631B2Three-level power factor rectifier and method of operating the same
Publication Date: 2026.04.21 DELTA ELECTRONICS INC(CN)
  • US12609631B2 patent drawing
  • US12609631B2 patent drawing
  • US12609631B2 patent drawing

AI summary

A three-level power factor rectifier includes a diode bridge arm, a bridge arm assembly, an input inductor, a capacitor bank, and a controller. The first bridge arm includes a first switch, a second switch, a third switch, and a fourth switch connected in series and in sequence. When the controller determines that a loading is less than a load threshold, the controller controls the three-level power factor rectifier entering a burst mode. In the burst sleep period, when a voltage value of an AC power source is greater than a first threshold, the first switch and the second switch are turned off; when the voltage value is less than a second threshold, the third switch and the fourth switch are turned on. When entering the burst period from the burst sleep period, the controller turns on the second switch and the third switch for a specific time period.