PFC Switch Timing Controller for Light Load PF and THD
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Solution Overview
Problem
Power factor correctors (PFCs) face challenges in achieving optimal power factor (PF) and total harmonic distortion (THD) performance, especially at light loads, due to trade-offs with switching voltage and electromagnetic interference (EMI) noise, which are exacerbated by variable loads in applications like TVs and computers.
Innovation Solution
A PFC switch timing controller that varies the switch on time based on the switch delay time, using a proportional-integral-derivative (PID) regulator to maintain average current proportionality to input voltage, thereby improving PF and reducing THD, even at light loads, while minimizing switching voltage and EMI noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If switch delay time is increased to reduce switching voltage and EMI noise, then switching voltage and EMI noise are reduced, but power factor and THD performance deteriorate
Solution Approach 1:
The patent implements dynamic switch timing control where the controller adjusts the switch on-time and off-time based on real-time detection of switch delay time and circuit parameters. This dynamic adjustment allows the system to optimize the trade-off between switching voltage reduction and maintaining PF/THD performance under varying load conditions.
Solution Approach 2:
The system incorporates feedback mechanisms that detect switch delay time, circuit parameters, and load conditions, then use this information to adjust switch timing. The controller continuously monitors and adapts the switch on-time and off-time to compensate for delay effects, thereby maintaining performance while reducing switching stress.
2Reliability
If PFC is designed for peak load performance, then peak load PF/THD performance is optimized, but performance at light loads deteriorates
Solution Approach 1:
The patent implements multi-mode operation with dynamic switching between critical conduction mode (CrCM) and discontinuous conduction mode (DCM) based on detected load conditions. The controller adapts switch timing parameters in real-time according to load level, ensuring optimal PF/THD performance across the entire operating range from light to peak loads.
Solution Approach 2:
The system changes operating parameters (switching mode, on-time, off-time) based on load detection. At light loads, the controller adjusts timing parameters and may switch to DCM to maintain performance, while at peak loads it operates in CrCM with optimized timing for maximum efficiency and power factor.
Data Source
AI summary
Methods, devices, and integrated circuits are disclosed for controlling switch timing in a power factor correction timing switch. In one example, a device is configured to receive one or more indications of one or more power factor correction circuit parameters. The device is further configured to determine a switch delay time based at least in part on the one or more power factor correction circuit parameters. The device is further configured to generate an indication of a switch on time for the power factor correction timing switch, wherein the switch on time is based at least in part on the switch delay time.