Zero-Crossing Detection Circuit for PFC Systems
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Solution Overview
Problem
Conventional bridge PFC converters experience high conduction and switching losses due to the presence of a rectifying bridge, and prior art methods for phase detection and zero current detection in bridgeless PFC systems introduce significant signal processing delays, affecting accuracy, especially at high frequencies.
Innovation Solution
A control circuit and method that includes a signal detection unit, ZCD signal acquisition unit, signal selection unit, frequency limiting unit, and PWM control signal generation unit, where analog circuits are used to reduce processing delay and improve signal processing accuracy by generating a ZCD trigger signal with a frequency no greater than a preset threshold, thereby simplifying signal processing and reducing processor performance requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If DSP/MCU is used to process ZCD signal digitally, then signal processing flexibility is improved, but processing delay increases significantly
Solution Approach 1:
The patent segments the signal processing tasks by separating frequency-limiting operations from the main DSP/MCU control loop. A dedicated hardware circuit handles the time-critical frequency limiting of ZCD signals, while the DSP/MCU focuses on higher-level control decisions, thus reducing overall processing delay while maintaining flexibility.
Solution Approach 2:
The patent introduces an intermediary hardware circuit between the ZCD signal source and the DSP/MCU. This intermediary performs preliminary frequency-limiting processing, acting as a mediator that prepares signals for the DSP/MCU without requiring the processor to handle every low-level signal conditioning task, thereby reducing processing delay.
2Measurement precision
If DSP/MCU processes high-frequency ZCD signals, then control accuracy can be maintained, but signal delay increases affecting system accuracy
Solution Approach 1:
The patent divides the control system into two parts: a hardware-based frequency-limiting circuit that handles high-frequency signal conditioning with minimal delay, and a DSP/MCU that performs lower-frequency control calculations. This segmentation allows high-frequency signals to be processed accurately without introducing significant delay to the overall system.
3Loss of energy
If bridgeless PFC is applied to reduce switch loss, then energy efficiency is improved, but phase detection and zero current detection become more difficult
Solution Approach 1:
The patent uses the AC-side inductor voltage as an intermediary signal to indirectly detect both phase information and zero-current conditions. Instead of directly measuring current (which would require additional sensors in the bridgeless configuration), the system uses voltage detection across the inductor as a mediator to infer current status, simplifying the detection task while maintaining efficiency.
Data Source
AI summary
The present disclosure provides a control circuit and a control method, where the control circuit includes: a signal detection unit, a ZCD signal acquisition unit, a signal selection unit, a frequency limiting unit, and a PWM control signal generation unit; where the signal detection unit, the ZCD signal acquisition unit, the signal selection unit, the frequency limiting unit, and the PWM control signal generation unit are connected in cascade. The control circuit and the control method provided in the present disclosure reduce processing delay of a ZCD signal and improve signal processing accuracy of a PFC system.