PFC Zero-Current Detection Circuit With Delay Compensation
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Solution Overview
Problem
Conventional inductor current detection in power factor correction circuits experiences delays due to integrated circuit and noise filter delays, leading to inaccurate zero detection and increased losses in power converter apparatuses, especially when detecting high-frequency and large currents.
Innovation Solution
A control circuit that adjusts the reference voltage for the comparator based on detected delay times, using a digital-to-analog converter to generate a dynamic reference voltage, thereby reducing detection delays and improving zero current detection accuracy in power factor correction circuits operating in current critical mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a shunt resistor, operational amplifier, and comparator are used for current detection, then the current detection circuit can be implemented, but detection delay occurs due to IC delay and noise filter delay
Solution Approach 1:
The patent applies preliminary action by calculating and setting a compensation value in advance based on the known delay characteristics of the operational amplifier and noise filter. This compensation value is added to the reference voltage before comparison, proactively offsetting the upcoming delay effect and achieving accurate zero detection despite the inherent detection lag in the circuit components.
2Measurement precision
If delay compensation is performed by adjusting reference voltage, then zero detection accuracy improves, but device complexity increases due to additional control circuit
Solution Approach 1:
The patent merges the delay compensation function with the existing reference voltage generation circuitry. The compensation value calculation and addition are integrated into the control circuit that already generates the reference voltage for the comparator, rather than adding a completely separate compensation system. This approach achieves accurate zero detection while minimizing the increase in device complexity by consolidating functions.
3Productivity
If high frequency and large current detection is required for small and large-capacity power supply development, then power density increases, but detection accuracy decreases due to increased delay effects
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the reference voltage parameter based on the operating conditions (frequency and current magnitude). The compensation value is calculated considering the specific delay characteristics at different operating points, allowing the system to maintain accurate zero detection across a wide range of frequencies and current levels, thereby enabling high power density designs without sacrificing detection accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents detection delays, reduces losses in power converter apparatuses, and increases power supply density by ensuring accurate zero current detection, even under high-frequency conditions without additional components or magnetic losses.
Implementation Method 1
current detection has been performed using a shunt resistor, an operational amplifier, and a comparator
Implementation Method 2
a comparator (see, for example, Non-Patent Document 1)
Implementation Method 3
a delay in a noise elimination filter
Data Source
Figure 1A
Figure 1B
Figure 2
AI summary
A control circuit is provided for a power converter apparatus including a PFC circuit with an inductor and operating in a current critical mode. The control circuit includes: a first detector circuit that detects an inductor current, amplifies a voltage corresponding to a detected current with a gain, and outputs the voltage as a detected voltage; a comparator that compares the detected voltage with a reference voltage, and outputs a comparison result signal; a second detector circuit that detects an input voltage; and a third detector circuit that detects an output voltage. The control circuit calculates a reference voltage for making a delay on detecting zero value of the inductor current be substantially zero, based on the input voltage, the detected output voltage, a preset delay time, an inductance, a conversion coefficient on current-to-voltage converting, a power supply voltage, and the gain, and outputs the reference voltage to the comparator.