Phase-Frequency Detector Dead-Zone Reduction via Pre-Charged Capacitors
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Solution Overview
Problem
Phase-frequency detectors (PFDs) in phase lock loops (PLLs) suffer from dead-zone and blind-zone issues, leading to inaccurate phase adjustments and increased noise due to the limited reaction time for output signals when phase differences are small or multiples of 2π, and existing designs are prone to inefficiencies from process variations.
Innovation Solution
A phase-frequency detector design incorporating two pulse generators, latch circuits, inverting circuits, sensing devices, and a reset control circuit, utilizing CMOS transistor structures and RC delay circuits to enhance signal detection and reduce dead-zone by ensuring sufficient reaction time and accurate voltage level detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the phase difference between clock signals is very small, then the signal rising edges are very close to each other, but there is not sufficient time for the output clock signals to reach the voltage levels corresponding to the phase difference, resulting in dead-zone
Solution Approach 1:
The patent applies preliminary action by pre-charging capacitors in the pulse generators to a voltage level higher than the threshold voltage before the detection event occurs. When a rising edge is detected, the pre-charged capacitor can immediately discharge through the sensing device to produce a valid output pulse, eliminating the dead-zone problem that occurs when capacitors need time to charge to threshold levels during small phase differences.
2Measurement precision
If the PFD uses more active devices to reduce dead-zone and blind-zone, then the phase adjustment accuracy improves, but the noise in the PLL increases
Solution Approach 1:
The patent extracts and eliminates unnecessary active devices from the PFD circuit while retaining the essential functionality. By using a simplified circuit architecture with pre-charged capacitors and direct discharge paths through sensing devices, the patent achieves dead-zone and blind-zone reduction without requiring complex multi-stage circuits, thereby minimizing the number of active devices and reducing generated noise.
3Measurement precision
If the reset of the PFD is very close to the rising edge of the signals in the next period, then the PFD cannot determine the exact value of the phase difference, resulting in blind-zone
Solution Approach 1:
The patent applies preliminary action by pre-charging the capacitors before the reset occurs and before the next period's rising edge arrives. This ensures that when the rising edge occurs, the capacitor is already charged and can immediately discharge to produce a valid output pulse, allowing the PFD to accurately determine the phase difference even when the reset is close to the next rising edge, thereby eliminating the blind-zone.
Data Source
AI summary
A phase-frequency detector generates output signals at a first and a second output end based on input signals received at a first and a second input end. The phase-frequency detector includes two latch circuits, two pulse generators, two inverting circuits, two sensing devices, and a reset control circuit. The sensing devices control the pulse generators based on signals received at corresponding first ends of the sensing devices. The inverting circuits generate signals to the first and second output ends of the phase-frequency detector based on signals received at corresponding first ends of the inverting circuits. The reset control circuit generates reset signals based on signals received at the first and second output ends of the phase-frequency detector.