PFM Voltage Converter Timing Compensation for Zero Inductor Current

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Solution Overview

Problem

Known switched-mode power converters, particularly of PFM type, face issues such as non-zero current in the inductive element at the end of each operating cycle due to delays in switching times, leading to inefficient power delivery and potential damage to components.

Innovation Solution

The proposed solution involves a DC/DC voltage converter with a control circuit that delays control signals to transistors by specific durations, ensuring the current in the inductive element is zero at the end of each cycle by compensating for propagation delays, using multiplexers and ramp generators to manage the switching phases effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If control signals are delayed by propagation time of comparator, then current in inductive element becomes non-zero at end of cycle, but switching timing precision is improved

Engineering Contradiction:
Improveswitching timing precisionVSAvoidcurrent zero-crossing reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by anticipating the propagation delay effect and pre-compensating for it through differential delay paths. The control circuit intentionally introduces different delay amounts to the first and second control signals before they reach the switching elements, so that when the signals actually arrive at the switching elements after propagation delay, the timing is corrected to ensure proper current zero-crossing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the timing parameters of control signals by introducing differential delays. The delay circuit modifies the time parameter of the control signals sent to the first and second switching elements, adjusting them to compensate for the comparator propagation delay. This parameter adjustment ensures that despite the inherent propagation delay, the switching timing achieves the desired precision and reliability.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If switching timing is adjusted to compensate for propagation delay, then power delivery efficiency is improved, but control circuit complexity increases

Engineering Contradiction:
Improvepower delivery efficiencyVSAvoidcontrol circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a delay circuit as an intermediary component between the control signal source and the switching elements. This intermediary circuit specifically addresses the propagation delay issue by introducing compensating delays to the control signals. The delay circuit acts as a mediator that corrects the timing without requiring complex control logic in the main control circuit, thus improving power delivery efficiency while adding only the necessary minimal complexity through the dedicated delay compensation mechanism.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11742755B2Voltage converter and method
Publication Date: 2023.08.29 STMICROELECTRONICS (GRENOBLE 2) SAS
  • US11742755B2 patent drawing
  • US11742755B2 patent drawing
  • US11742755B2 patent drawing

AI summary

An embodiment voltage converter includes a first transistor and a second transistor coupled in series, and a first circuit configured to control the first and second transistors. The control terminal of the second transistor is coupled to a first output of the first circuit by a second circuit configured to delay the control signals supplied at the first output by a first duration. The control terminal of the first transistor is coupled to a second output of the first circuit by a circuit configured to delay the control signals supplied at the second output, for a second period of each operating cycle, by a duration equal to twice the first duration and, during a second period of each operating cycle, by a duration equal to the first duration.