PFM DC-DC Converter Eliminates External Diodes

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Solution Overview

Problem

Existing DC-to-DC converters in computer systems require external diodes for pulse-frequency mode operation, increasing costs and inefficiencies due to conduction losses and voltage ripple at varying load currents.

Innovation Solution

A PFM DC-DC voltage regulator design that uses a voltage divider circuit, power transistors, and control circuitry including zero-crossing and skip-mode comparators to regulate load current with variable frequency, eliminating the need for external diodes and optimizing efficiency across wide load variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If external diodes are used for PFM operation, then the converter can operate in pulse-frequency mode, but the cost increases and conduction losses occur

Engineering Contradiction:
ImprovePFM operation capabilityVSAvoidconduction losses
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent removes the external diode component from the PFM converter circuit by integrating its functionality into the synchronous rectification architecture. The body diode of the low-side MOSFET replaces the external diode, eliminating conduction losses associated with external diodes while maintaining PFM operation capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent combines the rectification function with the synchronous switching MOSFETs, merging the diode's rectification role into the existing synchronous rectification circuit. This integration eliminates the need for separate external diodes and reduces overall conduction losses.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If external diodes are used for PFM operation, then the converter can regulate voltage, but the voltage ripple increases at varying load currents

Engineering Contradiction:
Improvevoltage regulationVSAvoidvoltage ripple
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent eliminates external diodes that generate voltage ripple, replacing their function with synchronous MOSFET switching that provides cleaner voltage regulation with reduced ripple content across varying load conditions.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the operating parameters by using active MOSFET switching instead of passive diode conduction, enabling precise control of switching timing and duration to minimize voltage ripple while maintaining stable voltage regulation during PFM operation.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If external diodes are used, then the converter structure is simpler to implement, but the cost increases

Engineering Contradiction:
Improveimplementation simplicityVSAvoidcomponent count
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges the rectification function into the synchronous MOSFET circuit, eliminating the need for external diodes. This reduces component count and BOM cost while maintaining implementation simplicity through the use of integrated synchronous rectification technology.

Inventive Principle:
Principle #5Merging (Combining)

4Reliability

If PWM mode is used, then the converter provides stable voltage, but the efficiency decreases at light load currents

Engineering Contradiction:
Improvevoltage stabilityVSAvoidpower loss at light load
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent implements dynamic switching between PWM and PFM modes based on load conditions. At light loads, the converter automatically transitions to PFM mode with variable switching frequency, reducing switching losses and improving efficiency while maintaining stable voltage output through closed-loop control.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operating mode from fixed-frequency PWM to variable-frequency PFM at light loads, adjusting the switching frequency and duty cycle dynamically to minimize power loss while maintaining voltage regulation through feedback control.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves high efficiency by regulating load current with variable frequency, reducing conduction losses and eliminating the need for external diodes, while maintaining efficiency across a wide range of load currents without increasing costs.

Implementation Method 1

An LC circuit comprising inductor 112 and capacitor 114 can be configured to smooth out the square-wave and produce the desired voltage, Vout

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Implementation Method 2

An LC circuit comprising inductor 112 and capacitor 114 can be configured to smooth out the square-wave and produce the desired voltage, Vout

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 3

Comparator 126 regulates VOUT by controlling when regulator circuit 200 skips cycles. It compares the voltage at node FB (VFB) to the reference voltage (VREF)

Methodology Applied
Scientific EffectVoltage comparison:

Implementation Method 4

Buck regulator 100 may be configured to operate in the PWM mode, switching a P-channel device 108 and an N-channel device 110 in order to produce a square-wave at their common node LX

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS7327127B2Pulse-frequency mode DC-DC converter circuit
Publication Date: 2008.02.05 VIA TECH INC
  • US7327127B2 patent drawing
  • US7327127B2 patent drawing
  • US7327127B2 patent drawing

AI summary

A step-down switching voltage regulator may operate in PFM mode based on peak current sense without requiring an external diode. The regulator may comprise a PMOS transistor and an NMOS transistor whose drains are coupled to a common output node and whose sources are coupled to high and low supply voltages, respectively, configured to develop a current in an inductor and generate an output voltage. A control circuit, coupled to the respective gates of the PMOS transistor and the NMOS transistor, may sense the current in the inductor (IL), sense an attenuated version of the output voltage (VFB), and sense the polarity of the voltage (VX) developed at the common output node. The control circuit may turn on the PMOS transistor when the VFB falls below a reference voltage and VX remains positive with respect to the low supply voltage, and may turn off the PMOS transistor when IL reaches a specified value or when VFB exceeds the reference voltage. The control circuit may also turn on the NMOS transistor after the PMOS transistor is turned off and VX becomes negative with respect to the low supply voltage, and may turn off the NMOS transistor when VX becomes positive with respect to the low supply voltage.