Pulse Frequency Modulation Circuit for Max-Frequency Detection
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Solution Overview
Problem
Existing methods fail to accurately detect when the maximal frequency of pulse frequency modulation signals has been reached, which is crucial for applications with high utilization value.
Innovation Solution
A detecting circuit and method utilizing an oscillation control unit, delay circuit, inverter, and latches to generate and delay pulses, determining the maximal frequency by observing the state of first-half-cycle pulses during the falling edge of delayed second-half-cycle pulses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the pulse frequency modulation operates at higher frequencies to increase workload capacity, then the operating frequency increases, but the ability to accurately detect maximal frequency decreases
Solution Approach 1:
The pulse frequency modulation signal is segmented into first-half-cycle pulses and second-half-cycle pulses. By separating the continuous high-frequency signal into discrete half-cycle segments, the circuit can accurately detect the maximal frequency condition by comparing the timing and state of these segmented pulses, even at very high operating frequencies where continuous wave detection would fail.
2Speed
If the interval TOFF between pulses is reduced to increase operating frequency, then the operating frequency increases, but the detection of maximal frequency becomes more difficult
Solution Approach 1:
The circuit performs preliminary action by generating the first-half-cycle pulse early in the cycle and using it to pre-set the latch state before the second-half-cycle pulse arrives. This preliminary positioning of the latch allows the circuit to accurately capture the maximal frequency condition even when the interval TOFF between pulses is extremely short, as the latch is already prepared to detect the transition.
Solution Approach 2:
The latch circuit serves as an intermediary element that mediates between the high-frequency pulse signals and the detection logic. It captures and holds the state information of the first-half-cycle pulse, allowing the maximal frequency condition to be detected by comparing this held state with the arrival of the second-half-cycle pulse, thereby simplifying the detection of very high frequency conditions.
Data Source
AI summary
The circuit for detecting the maximal frequency of the pulse frequency modulation includes an oscillator-controlling unit, a delay circuit and a master-slave register. The oscillator-controlling unit is connected to an oscillator, which generates the pulse frequency modulation signals, and includes a first-half pulse-generating module and a second-half pulse-generating module. The delay circuit is connected to the second-half pulse-generating module. The master-slave register includes a clock, an input end and an output end, wherein the input end is connected to the oscillator-controlling unit, and the clock is connected to the delay circuit.