Programmable Gain Amplifier Recovery From Common-Mode Overload
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Solution Overview
Problem
Analog signals exceeding the voltage range of an analog-to-digital converter (ADC) require attenuation or amplification, but existing solutions do not effectively manage noise and voltage domain transitions, especially when the common mode voltage is higher than the ADC's permitted range.
Innovation Solution
A programmable gain amplifier (PGA) with current mirrors and chopping techniques is used to adjust the common mode voltage and provide adjustable gain, reducing noise by implementing a 1:3 current mirror ratio and employing chopping to eliminate current element mismatches, ensuring the signal is within the ADC's input range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the common mode voltage is higher than the ADC's permitted range, then the analog signal can be processed by high voltage domain circuits, but the signal cannot be directly digitized by the ADC
Solution Approach 1:
The patent introduces an intermediary voltage domain conversion stage between the high voltage analog signal path and the low voltage ADC. This intermediary stage includes level shifting circuits and voltage domain translation mechanisms that convert the high common mode voltage signal to a level compatible with the ADC's input range, enabling reliable digitization without direct connection between high voltage and low voltage domains
Solution Approach 2:
The patent dynamically adjusts the common mode voltage level through programmable gain amplifier stages and voltage reference circuits. By changing the voltage domain parameters through controlled amplification or attenuation stages, the system adapts high voltage analog signals to match the ADC's permitted input range, resolving the voltage domain incompatibility issue
2Adaptability or versatility
If existing attenuation or amplification solutions are used for signals exceeding ADC voltage range, then the signal level can be adjusted, but noise management and signal integrity are compromised
Solution Approach 1:
The patent divides the signal path into multiple segmented stages, each with controlled gain or attenuation. Instead of a single large amplification or attenuation step that introduces significant noise, the signal is processed through several smaller stages, each contributing minimal noise. This segmented approach maintains signal integrity while achieving the necessary level adjustment
Solution Approach 2:
The patent implements feedback mechanisms in the programmable gain amplifier stages to maintain signal fidelity during level adjustment. The feedback loops compensate for noise introduced during amplification or attenuation, ensuring that the adjusted signal maintains its quality and integrity throughout the voltage domain transition
Data Source
AI summary
A circuit includes a first transistor having a first control input and first and current terminals. The circuit also includes a second transistor having a second control input and third and fourth current terminals. The third current terminal couples to the first current terminal at a first node. An output stage has a first input, a second input, and an output stage output. The first input couples to the fourth current terminal, and the second input couples to the second current terminal. A resistor has first and second resistor terminals. The first resistor terminal couples to the output stage output, and the second resistor terminal couples to the second control input. A third transistor has a third control input, a fifth current terminal, and a sixth current terminal. The fifth current terminal couples to the first resistor terminal, and the sixth current terminal couples to the second resistor terminal.