Programmable Gain Amplifier Resistance Balancing for High CMRR
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Solution Overview
Problem
Existing analog-to-digital converter (ADC) signal chains face challenges in achieving high common mode rejection ratio (CMRR) due to poor matching of polysilicon resistors, making it difficult to suppress common mode signals effectively, especially in applications requiring 80 dB or higher CMRR.
Innovation Solution
The implementation of a programmable resistance circuit with a hybrid R-2R resistor network and a delta sigma modulator, along with a two-tap finite impulse response (FIR) filter, to compensate for resistor mismatches and enhance CMRR, using dual balance resistances and trimmable resistance to balance the analog front end (AFE) inputs, thereby improving CMRR without degrading linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If polysilicon resistors are used in the AFE circuit, then the device complexity is reduced and manufacturing is simplified, but the manufacturing precision of resistance values deteriorates, resulting in poor resistor matching and low CMRR
Solution Approach 1:
A programmable resistance circuit is introduced as an intermediary component between the polysilicon resistors and the AFE inputs. This circuit includes a resistor network with switchable taps that can be programmed to specific resistance values to compensate for polysilicon resistor mismatches. The programmable resistance circuit acts as a mediator that corrects the precision deficiencies of polysilicon resistors while allowing the use of simpler polysilicon fabrication processes.
Solution Approach 2:
The resistance values in the programmable resistance circuit are made variable and programmable, allowing dynamic adjustment of resistance parameters. The resistor network includes multiple taps that can be selectively connected to achieve different resistance values, enabling fine-tuning of the AFE balance to achieve high CMRR. This parameter change capability allows compensation for manufacturing variations without requiring ultra-precise polysilicon resistors.
2Manufacturing precision
If a programmable resistance circuit with hybrid R-2R network is implemented to compensate for resistor mismatches, then the manufacturing precision of resistance matching is improved, but the device complexity increases
Solution Approach 1:
The programmable resistance circuit is segmented into a hybrid R-2R resistor network with discrete taps. This segmentation allows the complex resistance adjustment function to be broken down into manageable segments, each contributing to the overall resistance value. The segmented structure simplifies the control logic and reduces the complexity of programming compared to a fully continuous variable resistance approach.
Solution Approach 2:
The programmable resistance circuit uses a hybrid R-2R resistor network that combines two different resistor topologies (R-type and 2R-type) to achieve the desired functionality. This composite approach leverages the advantages of both resistor network types: the R-type provides precise resistance values while the 2R-type enables scalable binary-weighted switching. The hybrid structure achieves high precision resistance matching with reduced complexity compared to using a single complex network type.
3Measurement precision
If dual balance resistances are used in the programmable resistance circuit, then the common mode rejection ratio is improved, but the device complexity increases
Solution Approach 1:
The dual balance resistance configuration uses asymmetric resistance values on the positive and negative sides of the differential AFE input. By providing independent programmable balance resistances for each side, the circuit can asymmetrically compensate for mismatches in the polysilicon resistor network. This asymmetric approach achieves superior CMRR by independently balancing each differential side, rather than using a symmetric configuration that would require identical resistance values on both sides.
Solution Approach 2:
The dual balance resistance circuit serves multiple functions: it compensates for polysilicon resistor mismatches, balances the differential AFE inputs, and provides programmable adjustment for different operating conditions. By integrating these multiple functions into a single programmable resistance circuit block, the design achieves high CMRR without proportionally increasing overall device complexity, as the same hardware structure performs multiple compensation tasks.
4Object-affected harmful factors
If a two-tap finite impulse response filter is implemented to attenuate noise, then the harmful factors affecting the signal are reduced, but the device complexity increases
Solution Approach 1:
A two-tap FIR filter is implemented, which provides partial filtering action by attenuating noise at specific frequency components. Rather than using a complex high-order filter that would provide excessive noise attenuation across all frequencies (and thus increase complexity), the two-tap filter applies selective attenuation where most needed. This partial action approach achieves sufficient noise reduction for audio frequency ranges while maintaining low circuit complexity with only two filter taps.
Data Source
AI summary
A circuit includes an analog-to-digital converter (ADC). The circuit also includes an analog front end (AFE) having an AFE input and an AFE output. The AFE output is coupled the ADC's input. The AFE includes a programmable gain amplifier (PGA) having a first PGA input and a second PGA input. The PGA includes a first operational amplifier (OP AMP) with first and second OPAMP inputs. The AFE also including a programmable resistance circuit having a first programmable resistance circuit input and first and second programmable resistance circuit outputs. The first programmable resistance circuit input is coupled to the first and second PGA inputs. The programmable resistance circuit includes a resistor network having first and second balance resistances. The first balance resistance is coupled to the first and second OP AMP inputs, and the second balance resistance is coupled to the first and second OP AMP inputs.