Phase Abstraction for Multiphase Circuit Verification
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Solution Overview
Problem
Conventional functional verification tools face challenges in processing multiphase circuit designs due to their complexity, requiring rigid design styles and manual clock identification, which limits flexibility and efficiency.
Innovation Solution
The method involves identifying repetitive signals to extract multi-phase register characteristics, transforming the design into a phase-abstracted form with a reduced number of registers, and optimizing it for analysis, allowing for easier processing by duplicating logic sets and removing unnecessary logic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional functional verification tools are used to process multiphase circuit designs, then verification can be performed, but the processing complexity and computational requirements increase significantly
Solution Approach 1:
The multiphase circuit design is segmented into multiple single-phase representations, each corresponding to a specific phase. The verification tool processes each phase separately rather than attempting to analyze the entire multiphase design simultaneously, thereby reducing processing complexity while maintaining verification reliability.
Solution Approach 2:
A phase abstraction layer is introduced as an intermediary between the multiphase circuit design and the functional verification tool. This abstraction layer transforms the multiphase design into phase-specific representations that the verification tool can process efficiently, acting as a mediator that simplifies the verification process.
2Measurement precision
If manual clock identification is required for multiphase designs, then verification accuracy can be maintained, but the ease of operation and flexibility decrease
Solution Approach 1:
The system performs automatic phase identification and extraction without requiring manual user intervention. The verification tool automatically detects clock signals, identifies phases, and generates phase-specific representations, enabling the system to serve itself and eliminating the need for manual clock identification while maintaining verification accuracy.
Solution Approach 2:
The system changes the representation parameters of the circuit design by automatically extracting phase information and transforming the multiphase design into phase-specific formats. This parameter transformation enables automatic processing while preserving the accuracy needed for verification.
3Device complexity
If rigid design styles are enforced for multiphase circuits, then processing can be simplified, but adaptability and versatility are reduced
Solution Approach 1:
The system dynamically adapts to different multiphase design styles rather than enforcing a rigid structure. It automatically detects the phase characteristics of the given design and transforms it into appropriate phase-specific representations, allowing the verification process to accommodate various design styles and configurations without requiring the design to conform to a specific template.
Solution Approach 2:
The verification system is designed to be universal and handle multiple types of multiphase circuit designs regardless of their specific style or configuration. By automatically extracting phase information and generating phase-specific representations, the system can verify diverse designs without requiring them to adhere to a rigid design style, thereby achieving both processing simplicity and design flexibility.
4Productivity
If multiphase register characteristics are extracted and design is transformed into phase-abstracted form, then computational requirements are reduced, but the manufacturing precision and detail preservation may be affected
Solution Approach 1:
The design is segmented into phase-specific representations that preserve the essential characteristics of each phase while eliminating redundant information. By analyzing and verifying each phase separately, the system maintains design detail precision while reducing the overall computational requirements compared to analyzing the entire multiphase design as a single complex structure.
Data Source
AI summary
A method for functional verification includes transforming an original multiphase circuit design into a phase-abstracted circuit design by identifying cyclical (repetitive) signals in the multiphase circuit design, determining a number of simulation phases for the multiphase circuit design, unwinding the multiphase circuit design by the number of phases to create an unwound design, and then applying logic reduction techniques to the unwound design using the clock-like signals to reduce (simplify) the logic in the unwound design by eliminating unused/unnecessary registers, inputs, outputs, and logic. The resulting phase-abstracted design can then be processed much more efficiently by functional verification engines than the original multiphase circuit design due to the reduced number of registers/inputs.