Phase-Accumulator Frequency Synthesis for Fast Lock and Fine Resolution
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Solution Overview
Problem
Existing feedback-loop frequency synthesis devices face challenges in optimizing the time to establish the operating mode and frequency resolution, as well as phase noise, due to limitations in integer division PLLs and fractional steps, which often result in increased noise and complexity.
Innovation Solution
A feedback-loop frequency synthesis device using phase accumulators with multi-phase correspondence matrices to provide logic signals for phase comparison, eliminating the need for modulo value subtraction synchronization and digital/analog conversion, allowing for high resolution without compromising on time or noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If integer division PLL is used to achieve high frequency multiplication, then the output frequency can be generated, but the time to establish operating mode increases and resolution is limited
Solution Approach 1:
The patent changes the fundamental operating parameters by using phase accumulators instead of frequency dividers, and by using multi-phase correspondence matrices instead of traditional integer division. This allows the system to achieve high frequency multiplication factors while maintaining fast acquisition time and high resolution simultaneously, resolving the contradiction between frequency resolution and establishment time.
2Measurement precision
If fractional steps are used to increase multiplying factor resolution, then frequency resolution improves, but phase noise increases
Solution Approach 1:
The patent replaces the traditional mechanical-like frequency division mechanism with a digital phase accumulation and comparison mechanism. By using phase accumulators and multi-phase correspondence matrices, the system achieves fine frequency resolution through digital counting and comparison rather than through fractional division, thereby avoiding the phase noise generation inherent in fractional step approaches.
3Measurement precision
If traditional phase comparison with modulo subtraction is used, then phase difference can be measured, but synchronization complexity increases
Solution Approach 1:
The patent extracts and eliminates the complex modulo subtraction and synchronization mechanisms from the phase comparison process. By using phase accumulators that naturally accumulate phase differences and multi-phase correspondence matrices that directly map phase values to logic signals, the system achieves accurate phase difference measurement without requiring complex synchronization between different modulo operations.
Data Source
AI summary
A frequency synthesis device includes a servo circuit for controlling an output frequency to an input reference frequency. The circuit includes a first phase accumulator clocked by the reference frequency, a phase comparison block, a loop filter and an oscillator. It further includes a feedback loop connecting the output to the comparison block, having a second phase accumulator clocked by the output frequency. The comparison block includes T phase comparators with logic gates receiving respectively T first logic signals from the servo circuit on T first inputs and T second logic signals from the feedback loop on T second inputs, the T first and second signals having logic levels that continuously depend on values provided by the first and second accumulators according to at least one multi-phase correspondence matrix.