Phase-Modulated ADC Sampling Clock Control for Higher Resolution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional analog-digital converters face challenges such as DC voltage errors, transient oscillation errors, quantization noise, and high-frequency limitations, particularly in phase modulation converters, which require expensive and complex components to achieve high accuracy.
Innovation Solution
A method and device that dynamically alters the phase position of the sampling clock signal in steps of less than 40° to increase resolution, using an amplitude modulator with carrier suppression, an adder, a limiter, and a demodulator, allowing for higher sampling rates without reducing the modulator frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the sampling rate is increased to achieve higher resolution, then measurement precision is improved, but the modulator frequency must be reduced which increases filter component size
Solution Approach 1:
The patent applies dynamics by making the sampling clock signal phase variable rather than fixed. The phase of the sampling clock is dynamically adjusted to optimize the measurement process, allowing high resolution to be achieved without reducing the modulator frequency. This dynamic phase adjustment enables the system to maintain both high sampling effectiveness and high modulator frequency, avoiding the need for large filter components.
Solution Approach 2:
The patent changes the phase parameter of the sampling clock signal to achieve higher resolution measurements. By varying the phase position of the sampling clock in controlled steps, the system can optimize measurement precision without compromising the modulator frequency. This parameter change approach allows decoupling of resolution from modulator frequency reduction, thereby avoiding increased filter component size.
2Measurement precision
If the modulator frequency is reduced to increase the sampling rate difference, then resolution is improved, but productivity decreases
Solution Approach 1:
The patent employs dynamic phase adjustment of the sampling clock to achieve high resolution without reducing modulator frequency. This dynamic approach allows the system to maintain both high data rate (productivity) and high measurement precision, as the phase variable enables optimal sampling points to be selected without changing the fundamental operating frequencies of the system.
Solution Approach 2:
By changing the phase parameter of the sampling clock rather than the frequency parameters, the patent achieves resolution improvement while maintaining productivity. The phase adjustment provides an additional degree of freedom that decouples the relationship between resolution and data rate, allowing both to be optimized simultaneously.
3Measurement precision
If high accuracy is achieved using conventional phase modulation converters, then measurement precision is improved, but device complexity and cost increase
Solution Approach 1:
The patent uses a simplified approach by copying the essential phase modulation function with a variable phase sampling clock rather than implementing complex conventional phase modulation converter architectures. This allows high accuracy to be achieved with reduced device complexity, as the invention leverages the existing modulator structure and adds only phase control to the sampling clock.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances resolution and decouples the data rate from the modulator frequency, enabling compact and cost-effective filter designs while maintaining high modulator frequency, facilitating capacitive isolation and reducing component size and cost.
Implementation Method 1
amplitude modulator with carrier suppression for providing a carrierless amplitude-modulated signal
Implementation Method 2
adder, to which the carrierless amplitude-modulated signal output by the amplitude modulator is supplied and which is set up to add a carrier signal offset by 90° to this and to provide a phase-modulated signal
Implementation Method 3
limiter, to which the phase-modulated signal output by the adder is supplied and which is designed to suppress interference amplitude modulation in the phase-modulated signal
Implementation Method 4
demodulator, to which the signal output by the limiter is supplied and can be sampled therein with at least one sampling clock signal, wherein the phase position of the at least one sampling clock signal can be altered in a variable manner
Data Source
AI summary
Method and device for converting an analog input signal into a digital output signal, wherein the analog input signal is supplied to be converted to the input side of an amplitude modulator with carrier suppression to obtain a carrierless amplitude-modulated signal, an adder adds a sinusoidal carrier signal offset by 90° to the amplitude-modulated signal output by the amplitude modulator to obtain a phase-modulated signal, the phase-modulated signal is supplied to a limiter that is used to suppress interference amplitude modulation in the phase-modulated signal, and the signal output by the limiter is supplied to a demodulator and sampled therein with at least one sampling clock signal, where the phase position of the at least one sampling clock signal is dynamically altered to achieve a higher resolution.