Precision Phase Adder PLL Initialization for Low-Spur Coherence
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Solution Overview
Problem
Conventional phase adder circuits at high frequencies suffer from non-linear effects, generating undesired spurious signals and output phase errors due to their double-side-band nature, making it difficult to achieve ideal phase coherence in phased arrays for communication systems.
Innovation Solution
A method for initializing a phase adder circuit using a multiplier circuit, mixer, amplifier, low pass loop filter, and voltage-controlled oscillator (VCO) is implemented, where a reference voltage is determined to produce a signal at nf0, and an adjustment signal is applied to form a primary phase locked loop (PLL) circuit, reducing intermodulation distortion and phase errors by operating in the triode region of MOS transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional double-side-band analog multipliers are used for phase addition at high frequencies, then phase coherent signal distribution can be achieved, but non-linear effects generate undesired spurious signals and output phase errors
Solution Approach 1:
The patent extracts and removes one side band from the double-side-band analog multiplier output, leaving only the desired single side band. This is achieved through filtering techniques that eliminate the unwanted side band containing spurious signals while preserving the phase addition function.
Solution Approach 2:
The patent changes the operating parameters of the analog multiplier to optimize performance at high frequencies. This includes adjusting bias conditions, signal amplitudes, and frequency ratios to minimize non-linear effects and reduce the generation of spurious signals.
2Object-generated harmful factors
If single-side-band analog multipliers are used to reduce spurious signals, then output phase errors are reduced, but removing one side band introduces additional output phase errors
Solution Approach 1:
The patent employs feedback mechanisms to monitor and correct phase errors introduced during side band removal. By continuously adjusting the output based on phase error detection, the system maintains high phase accuracy despite the side band filtering process.
Solution Approach 2:
The patent applies preliminary phase calibration and adjustment before the side band removal process. This pre-adjustment compensates for known phase errors that will be introduced, ensuring that the final output maintains the required phase coherence.
3Length of stationary object
If phase adders are implemented in practical circuits, then signal distribution over long electrical distances is enabled, but non-linear effects are enhanced at high frequencies generating more spurious signals
Solution Approach 1:
The patent divides the signal distribution system into multiple stages, with phase adders distributed throughout the network rather than concentrated in one location. This segmentation allows for intermediate filtering and signal conditioning, reducing the accumulation of spurious signals over long distances.
Solution Approach 2:
The patent introduces intermediary filtering stages and signal conditioning circuits between the phase adders and the final output points. These intermediaries actively suppress spurious signals generated at high frequencies before they can propagate through the entire distribution network.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces spurs and phase errors, achieving a cleaner output signal with reduced noise floor and improved amplification, maintaining phase coherence across a phased array.
Implementation Method 1
determining a reference voltage which when applied to the input of the VCO causes the VCO to produce at its output a signal having a frequency of nf0
Implementation Method 2
supplying a signal of frequency nf0 to a first input of the mixer; supplying a signal of frequency (nf0+Δf) to a second input of the mixer
Data Source
AI summary
A method for initializing a phase adder circuit including a multiplier circuit with its two inputs receiving signals of frequency fo, a mixer circuit, an amplifier circuit, a low pass loop filter, and a voltage controlled oscillator (VCO), the method including: during a first phase, determining a reference voltage which when applied to the VCO causes it to produce a signal having a frequency of nf0; during a second phase, supplying a signal of frequency nfo to a first input of the mixer and a signal of frequency (nfo+Δf) to a second input of the mixer; and determining an adjustment signal which when applied to the amplifier circuit causes the amplifier circuit to output a signal having a DC component equal to the reference voltage; and during a third phase, forming a primary phase locked loop (PLL) circuit including the mixer, the amplifier circuit, the low pass loop filter and the VCO; and applying the adjustment signal to the amplifier circuit.