Phase Adjusting Device for Multi-IC Voltage Drop Reduction
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Solution Overview
Problem
Existing circuit systems face voltage drop and electromagnetic interferences due to simultaneous channel activation during frequency synchronization, as they can only shift phases within a single integrated circuit and not between different integrated circuits.
Innovation Solution
A phase adjusting device and system that includes a main delay circuit, converters, and buck circuits to generate phase-shifted signals across multiple integrated circuits, allowing for staggered voltage outputs and reduced interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all channels are turned on at the same time for frequency synchronization, then the circuit system achieves frequency synchronization, but voltage drop and electromagnetic interferences occur
Solution Approach 1:
The patent applies preliminary action by introducing a delay circuit that intentionally delays the activation of the second channel relative to the first channel. This staggered activation sequence is established before the system operates, preventing simultaneous turn-on of all channels. The delay circuit creates a time difference where the first channel activates first, followed by the second channel after a predetermined delay period, thereby avoiding voltage drop and EMI while maintaining frequency synchronization.
2Adaptability or versatility
If phase shifting is implemented within a single integrated circuit, then phase adjustment is achieved, but phase shifting between different integrated circuits cannot be accomplished
Solution Approach 1:
The patent applies universality by designing a delay circuit that can be integrated into different integrated circuits while maintaining consistent phase delay functionality. The delay circuit uses universal components (resistors, capacitors, operational amplifiers) that can be implemented across multiple circuits, enabling phase shifting capability to be extended from single-circuit to multi-circuit systems. This allows the same phase adjustment mechanism to work universally across different integrated circuits without requiring fundamentally different approaches.
Data Source
AI summary
A phase adjusting device provided includes a main delay circuit, a first converter, a second converter, a first buck circuit, and a second buck circuit. The main delay circuit receives an input clock signal to generate a main delay signal. The first converter receives the input clock signal to generate a first conversion signal. The second converter is coupled to the main delay circuit to receive the main delay signal and generate a second conversion signal. The first buck circuit is coupled to the first converter to receive the first conversion signal and generate a first buck voltage. The second buck circuit is coupled to the second converter to receive the second conversion signal and generate a second buck voltage. A first phase difference is formed between the main delay signal and the input clock signal.


