Phase Calibration Circuit for Wide-Band Data Clock Sampling

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Solution Overview

Problem

Conventional techniques fail to correctly sample data signals due to large frequency variations between data and clock signals, leading to sampling errors, and there is a need for effective phase calibration across a large frequency band.

Innovation Solution

An apparatus comprising an adjustable delay circuit, phase detection circuit, charge pump, capacitor, comparator, and digital control circuit that detects and adjusts the phase difference between data and clock signals to ensure accurate sampling by generating and adjusting delay control signals based on phase difference signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional sampling techniques are used, then the sampling process is simple, but sampling errors occur due to phase difference between data and clock signals

Engineering Contradiction:
Improvesampling accuracyVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a phase calibration device as an intermediary component between the data signal and sampling clock. This device includes a phase detector that detects phase difference, a charge pump that generates control signals based on detected phase difference, and a delay circuit that adjusts the clock signal timing. This intermediary system resolves the phase misalignment issue without requiring fundamental changes to the sampling architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a feedback mechanism where the phase detector continuously monitors the phase difference between data and clock signals, feeds this information to the charge pump, which then adjusts the delay circuit to correct the timing. This closed-loop feedback system automatically maintains optimal sampling timing despite frequency variations or phase drift.

Inventive Principle:
Principle #23Feedback

2Reliability

If the phase calibration device is added to improve sampling accuracy, then sampling errors are reduced, but the device complexity increases

Engineering Contradiction:
Improvesampling accuracyVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The phase calibration device is segmented into distinct functional modules: phase detector, charge pump, and delay circuit. Each module performs a specific function and can be independently optimized or replaced. This segmentation makes the complex function manageable and allows for modular implementation that can be integrated into existing systems with minimal disruption.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If conventional techniques are used, then the device structure is simple, but phase calibration is ineffective for large frequency variations

Engineering Contradiction:
Improvefrequency band adaptabilityVSAvoidcircuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent employs dynamic adjustment mechanisms where the delay circuit can continuously vary the clock signal timing based on real-time phase detection. The charge pump dynamically adjusts the delay amount in response to frequency variations, allowing the system to adapt to a wide frequency band. This dynamic capability enables the system to maintain sampling accuracy across varying operating conditions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8710882B2Calibration device and related method for phase difference between data and clock
Publication Date: 2014.04.29 REALTEK SEMICON CORP
  • US8710882B2 patent drawing
  • US8710882B2 patent drawing
  • US8710882B2 patent drawing

AI summary

A calibration device and related method for a phase difference between data signal and clock signal are disclosed. An apparatus of the invention includes: an adjustable delay circuit for delaying at least one of a first input signal and a second input signal according to a delay control signal, and generating a first signal and a second signal; a phase detection circuit for detecting a phase difference between the first signal and the second signal to output a phase difference signal; a charge pump and a capacitor for outputting a control signal according to the phase difference signal; a comparison circuit for outputting a comparison result according to the control signal; and, a digital control circuit for outputting the delay control signal according to the comparison result.