Phase Change Memory Cell Programming Bias Voltage Setup
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Solution Overview
Problem
The existing methods for programming phase change memory cells are resource-intensive due to the time and effort required for bit line and word line setup, especially when transitioning between set and reset states, and when handling successive memory cells in an array.
Innovation Solution
A method and system for programming programmable resistive memory cells that involves determining the set or reset state of each cell and applying appropriate bias voltages to bit lines and word lines, reducing the number of setup changes by executing SET and RESET processes efficiently, thereby minimizing the steps needed for bit line and word line setup.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional programming methods are used for phase change memory cells, then complete bit line and word line setup procedures are executed for each cell, but this results in excessive time consumption and resource expenditure
Solution Approach 1:
The patent applies preliminary action by pre-configuring bit line and word line connections based on anticipated programming operations. The system prepares the electrical connections in advance before actual programming is needed, allowing subsequent programming operations to proceed without repeated setup delays. This is achieved through control logic that predicts which cells will be programmed and pre-establishes the necessary voltage connections.
Solution Approach 2:
The patent implements universality by creating a unified control mechanism that manages bit line and word line setups for multiple programming operations. The same control circuitry and connection infrastructure are used across different programming scenarios (set operations, reset operations, sequential cell programming), eliminating the need for separate dedicated setup procedures for each operation type.
2Reliability
If bit line and word line setup procedures are executed for each memory cell programming operation, then proper voltage connections are established, but this increases device complexity and resource expenditure
Solution Approach 1:
The patent merges the bit line setup and word line setup procedures into a single integrated control process. Instead of executing separate setup routines for bit lines and word lines, the system combines these operations under unified control logic that manages both connection types simultaneously. This reduces the overall complexity while maintaining the reliability of proper voltage connections being established.
Solution Approach 2:
The control circuitry automatically determines and configures the necessary bit line and word line connections without requiring external intervention or complex external control sequences. The system self-manages the setup procedures by internally tracking which cells need programming and autonomously establishing the appropriate voltage connections, thereby simplifying the overall device interface and control architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the time and resource expenditure associated with bit line and word line setup, enabling faster and more efficient programming of phase change memory cells, particularly when handling successive cells in an array with varying programming requirements.
Implementation Method 1
Phase change based memory materials are widely used in read-write optical disks. These materials have at least two solid phases, including for example a generally amorphous solid phase and a generally crystalline solid phase.
Implementation Method 2
Current heats the material and causes transitions between the states.
Implementation Method 3
The generally amorphous state is characterized by higher resistivity than the generally crystalline state; this difference in resistance can be readily sensed to indicate data.
Data Source
AI summary
A method, system and computer program product for programming a plurality of programmable resistive memory cells is disclosed. The method comprises executing a first process to program input data, including setting up bias voltages on bit lines and word lines on the memory cells, determining if the input data for each memory cell corresponds to a set state and then setting such cells to a set state. The method further comprises executing a second process to program input data, determining if the input data for each memory cell corresponds to a reset state and then resetting such cells to a reset state.