3D Phase Change Memory with Constricted Current Paths
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Solution Overview
Problem
Current phase change memory devices face challenges in optimizing the transition between amorphous and crystalline states for efficient data storage due to limitations in controlling current paths and cooling rates, leading to suboptimal resistivity states and thermal disturbances.
Innovation Solution
A three-dimensional phase change memory device is designed with vertically constricted current paths and a specific manufacturing method involving an alternating stack of insulating and sacrificial layers, where phase change memory material is deposited within memory openings with vertically constricted configurations, allowing precise control over the phase change process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional current paths are used in phase change memory devices, then manufacturing is simpler, but thermal disturbances increase and reset current density decreases
Solution Approach 1:
The current path is segmented into multiple vertical sections with varying cross-sectional areas, creating constricted regions that localize current flow and thermal effects. This segmentation allows different portions of the phase change material to experience controlled thermal conditions, reducing unwanted thermal disturbances while maintaining manageable device complexity through systematic structuring.
Solution Approach 2:
The device structure implements local quality variations by creating specific constricted regions with different geometries at different vertical positions. These localized structural modifications concentrate current and thermal effects precisely where needed, improving reset current density and reducing thermal disturbances in specific areas without requiring complete redesign of the entire device architecture.
2Reliability
If vertically constricted current paths are implemented, then reset current density increases, but manufacturing precision requirements increase
Solution Approach 1:
The manufacturing process employs preliminary patterning steps that define the constricted current path geometry before final material deposition. By pre-establishing the structural framework with insulating layers and conductive elements in alternating stacks, the subsequent phase change material deposition follows predetermined pathways, reducing the precision burden on later manufacturing steps while ensuring reliable current confinement.
Solution Approach 2:
Alternating stacks of insulating layers and electrically conductive layers serve as intermediary structures that guide and constrain the current path. These intermediary layers with different vertical thicknesses create the constricted geometry without requiring direct precision control of the phase change material itself, as the insulating and conductive layers act as templates and barriers that define the current flow paths.
3Speed
If phase change material thickness is reduced, then switching speed increases, but thermal control becomes more difficult
Solution Approach 1:
The solution transitions from controlling thermal parameters in a single horizontal plane to utilizing the vertical dimension for thermal management. By creating alternating stacks with varying layer thicknesses in the vertical direction, the device achieves precise control over heat dissipation pathways and cooling rates, enabling fast switching speeds while maintaining adequate thermal control through multi-layer vertical architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the transition between resistive states, reduces thermal disturbances, and increases reset current density, leading to faster operation, lower power consumption, and reduced driver transistor size, while maintaining efficient data storage capabilities.
Implementation Method 1
The transition between the amorphous state and the crystalline state can be induced by controlling the rate of cooling after application of an electrical pulse that renders the phase change material amorphous in a first part of a programming process
Implementation Method 2
application of an electrical pulse that renders the phase change material amorphous
Data Source
AI summary
An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings are formed through the alternating stack. Protruding tip portions are formed on each of the sacrificial material layers around the memory openings. A plurality of insulating spacers is formed within each memory opening between each vertically neighboring pair of tip portions of the sacrificial material layers. A phase change memory material and a vertical bit line are formed within each of the memory openings. The phase change memory material can be formed as a vertical stack of discrete annular phase change memory material portions, or can be formed as a continuous phase change memory material layer. Each of the sacrificial material layer can be replaced by an electrically conductive layer.