Phase Change Memory Latch Circuit Integration
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Solution Overview
Problem
Conventional non-volatile latches are not fast enough and are difficult to integrate into mainstream semiconductor processes.
Innovation Solution
A latch circuit utilizing a phase change memory cell, specifically an ovonic unified memory (OUM) with a programming circuit comprising transistors that set and reset the memory cell to different resistance states, and a read circuit that monitors the state without disturbing it, allowing for efficient integration into semiconductor processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional non-volatile latches are used, then non-volatile storage is achieved, but operation speed is slow
Solution Approach 1:
The patent merges a phase change memory cell with a latch circuit structure, combining the non-volatile storage capability of phase change memory with the fast switching characteristics of latch circuits. This integration allows the circuit to achieve both non-volatile storage and fast operation speeds simultaneously.
Solution Approach 2:
The patent utilizes phase changes in the memory material (amorphous to crystalline transitions) to dramatically change resistance parameters, enabling fast switching between logic states. The phase change material exhibits high resistance in amorphous state and low resistance in crystalline state, providing rapid and distinct logic level transitions.
2Ease of manufacture
If conventional non-volatile latches are used, then storage functionality is achieved, but integration into semiconductor processes is difficult
Solution Approach 1:
The patent designs the phase change memory cell to serve multiple functions: it acts as both the storage element and the switching element in the latch circuit. This multi-functionality reduces the number of separate components needed and simplifies the integration process into existing semiconductor manufacturing workflows.
Solution Approach 2:
The patent employs standard transistor designs and circuit topologies that are already well-established in mainstream semiconductor processes, making the phase change latch compatible with existing manufacturing infrastructure. The programming and read circuits use conventional transistor configurations that can be fabricated using standard CMOS or bipolar processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables faster operation and easier integration of non-volatile latches into semiconductor processes, providing a latch that is both faster and more versatile in configuration.
Implementation Method 1
a phase change memory cell, specifically an ovonic unified memory (OUM) with a programming circuit comprising transistors that set and reset the memory cell to different resistance states
Data Source
AI summary
A non-volatile memory latch may be formed with a phase change memory layer. Such a latch may be faster and more easily integrated into main stream semiconductor processes than conventional latches that use non-volatile memory elements such as flash memory.