Phase Change Memory Reference Cell Drift Compensation
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Solution Overview
Problem
Phase change memory devices using chalcogenide materials face issues with threshold voltage drift in ovonic threshold switches, leading to reading errors in both crystalline and amorphous states, affecting the reliability of stored data.
Innovation Solution
The implementation of reference cells with the same structure as memory cells, programmed simultaneously to maintain consistent electrical properties, allowing for accurate reading by comparing memory cells with their reference cells to account for any drift in threshold voltage or resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If ovonic threshold switches are used in phase change memory cells, then the memory device can achieve non-volatile storage with fast switching speeds, but threshold voltage drift occurs leading to reading errors
Solution Approach 1:
The patent introduces reference cells that are identical copies of memory cells, programmed to the same state (both to SET or both to RESET). By comparing the current through the memory cell with the current through the reference cell, the system compensates for threshold voltage drift in the ovonic threshold switch, eliminating reading errors while maintaining fast switching speeds
2Quantity of substance
If chalcogenide materials are used for phase change memory, then high density storage is achieved, but threshold voltage and resistance drift affect data reliability
Solution Approach 1:
Reference cells are created as identical copies of memory cells using the same chalcogenide material (Ge2Sb2Te5). These reference cells are programmed simultaneously with the memory cells to the same state. During reading, the current through the memory cell is compared with the current through the reference cell, compensating for drift in threshold voltage and resistance caused by the chalcogenide material properties
Solution Approach 2:
The patent changes the operational parameters by programming reference cells to match memory cells in both SET and RESET states. This creates a dynamic reference that tracks parameter drift (threshold voltage and resistance changes) over time and cycling, allowing accurate reading despite material degradation
3Productivity
If memory cells are arranged in rows and columns array, then high integration density is achieved, but reading errors occur due to threshold voltage drift in selectors
Solution Approach 1:
In the cross-point array architecture, reference cells are interspersed among memory cells in the same row and column structure. Each reference cell is a copy of a memory cell and is programmed to the same state. The reading operation compares currents through memory cells and reference cells simultaneously, compensating for selector threshold voltage drift while maintaining high integration density
Solution Approach 2:
The patent segments the array into groups where reference cells are distributed among memory cells. This segmentation allows local compensation for drift in each section of the array, maintaining reading precision across the entire high-density cross-point structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures reliable reading of memory cells by compensating for threshold voltage and resistance drift, enhancing the accuracy of data storage and retrieval in phase change memory devices.
Implementation Method 1
phase change memories use a class of materials that have the property of switching between two phases having distinct electrical characteristics, associated to two different crystallographic structures of the material, and precisely an amorphous, disorderly phase and a crystalline or polycrystalline, orderly phase
Implementation Method 2
the crystallization temperature and the melting temperature are obtained by causing an electric current to flow through the resistive electrode in contact or close proximity with the chalcogenic material and thus heating the chalcogenic material by Joule effect
Implementation Method 3
To bring the chalcogenide back to the amorphous state it is necessary to raise the temperature above the melting temperature (approximately 600° C.) and then rapidly cool off the chalcogenide
Data Source
AI summary
A phase change memory device with memory cells (2) formed by a phase change memory element (3) and a selection switch (4). A reference cell (2a) formed by an own phase change memory element (3) and an own selection switch (4) is associated to a group (7) of memory cells to be read. An electrical quantity of the group of memory cells is compared with an analogous electrical quantity of the reference cell, thereby compensating any drift in the properties of the memory cells.