Phase Change Memory Device Thermal Interference Reduction
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Solution Overview
Problem
Conventional phase change memory devices face limitations in reducing thermal interference between adjacent phase change patterns, which affects integration density and device performance.
Innovation Solution
The design includes a first electrode with a first surface and a second electrode with a second surface at a different level, both in contact with respective phase change patterns, with an interlayer insulating layer and spacers to manage heat transfer and reduce thermal interference, allowing for increased spacing between the patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the gap between phase change patterns is reduced to increase integration density, then integration density is improved, but thermal interference between adjacent patterns increases
Solution Approach 1:
An interlayer insulating layer is introduced as an intermediary between adjacent phase change patterns. This insulating layer acts as a thermal barrier that blocks heat transfer from one phase change pattern to adjacent patterns, thereby reducing thermal interference while allowing the patterns to be placed closer together for higher integration density.
Solution Approach 2:
The solution moves from a two-dimensional planar arrangement to a three-dimensional structure by adding vertical layering with the interlayer insulating layer. This dimensional change allows heat confinement in the vertical direction while enabling closer horizontal spacing of phase change patterns.
2Object-affected harmful factors
If the spacing between phase change patterns is increased to reduce thermal interference, then thermal interference is reduced, but integration density decreases
Solution Approach 1:
The interlayer insulating layer serves as a thermal barrier that enables closer spacing of phase change patterns without suffering from thermal interference. This mediator allows the system to achieve both reduced thermal interference and maintained high integration density simultaneously.
3Temperature
If heat transfer between phase change patterns is increased to improve heat management, then heat management is improved, but thermal interference between patterns increases
Solution Approach 1:
The interlayer insulating layer creates localized thermal management by confining heat to specific regions around each phase change pattern. This local quality control allows efficient heat management within each cell while preventing thermal interference with adjacent cells through the insulating barrier.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively decreases thermal interference between phase change patterns, enhancing integration density and device performance by allowing for greater spacing between the patterns and improved heat management.
Implementation Method 1
If a program current flows through the first lower electrode 17A, Joule heat is generated at an interface between the first lower electrode 17A and the first phase change pattern 18A. The Joule heat converts a first transition volume 20A that is a part of the first phase change pattern 18A into an amorphous or crystalline state.
Implementation Method 2
The phase change material layer may be a material layer that electrically switches between an amorphous state and a crystalline state.
Data Source
AI summary
A phase change memory device and method of manufacturing the same is provided. A first electrode having a first surface is provided on a substrate. A second electrode having a second surface at a different level from the first surface is on the substrate. The second electrode may be spaced apart from the first electrode. A third electrode may be formed corresponding to the first electrode. A fourth electrode may be formed corresponding to the second electrode. A first phase change pattern may be interposed between the first surface and the third electrode. A second phase change pattern may be interposed between the second surface and the fourth electrode. Upper surfaces of the first and second phase change patterns may be on the same plane.