Phase Change Super-Lattice Stack Defect Reduction
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Solution Overview
Problem
Phase change memory devices with thin Sb2Te3 layers less than 8 nm suffer from structural defects and reduced electronic and thermal properties, limiting their performance.
Innovation Solution
A method involving curing annealing after stack formation to reduce structural defects, with optional additional annealing steps to achieve a zero defect rate, preserving stoichiometry and improving crystalline quality, is implemented.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the thickness of Sb2Te3 layers is reduced to less than 8 nm, then the device integration density is improved, but structural defects increase and electronic/thermal properties deteriorate
Solution Approach 1:
The patent applies preliminary action by performing a curing annealing treatment after depositing the thin Sb2Te3 layers but before final device operation. This annealing step proactively repairs structural defects and stabilizes the crystallographic structure, preventing the deterioration of electronic and thermal properties that would otherwise occur with thin layers. The annealing is conducted at controlled temperatures and durations to optimize defect reduction while maintaining layer integrity.
2Volume of moving object
If the thickness of Sb2Te3 layers is reduced to less than 8 nm, then the device integration density is improved, but programming speed and endurance deteriorate
Solution Approach 1:
The curing annealing treatment serves as a preliminary action that restores and enhances the electronic and thermal properties of thin Sb2Te3 layers before they are used in device operation. By conducting the annealing at optimized temperatures and durations, the patent ensures that the layers achieve their maximum performance potential, thereby enabling high programming speed and endurance despite the reduced layer thickness.
3Volume of moving object
If the thickness of Sb2Te3 layers is reduced to less than 8 nm, then the device integration density is improved, but electronic and thermal properties are reduced
Solution Approach 1:
The patent employs preliminary action through curing annealing to restore and optimize the electronic and thermal properties of thin Sb2Te3 layers before device operation. The annealing process is carefully controlled with specific temperature and duration parameters to maximize property restoration while minimizing material degradation, thereby reducing energy loss in the thin-layer structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method significantly enhances the performance of phase change super-lattice stacks by reducing defect rates, achieving comparable performance to thicker Sb2Te3 layers without the need for increased thickness, thereby improving programming speed and endurance.
Implementation Method 1
at least one curing annealing is carried out after formation of the stack. The curing annealing is such that the stack has, after said annealing, a nominal defect rate less than 50% of an initial defect rate of the stack
Implementation Method 2
a formation of the stack on a surface of the substrate, said formation comprising at least: One formation of the first layer, One formation of the second layer on the first layer
Implementation Method 3
Certain crystallographic phases of these PCM materials make it possible to accommodate the gaps present in the crystalline lattice by adopting a structure in the form of layers sparsely bonded together by very sparsely covalent homopolar bonds or of the van der Waals type. These weak bonds between crystalline layers or blocks in the structure of the PCM material are called van der Waals gaps or pseudo-gaps
Data Source
AI summary
A method for manufacturing a phase change stack having a crystallographic structure made of layers separated by van der Waals pseudo-gaps, may include: providing a substrate; forming the stack on the substrate, including (i) forming the first layer, and (ii) forming the second layer on the first layer. Advantageously, after formation of the stack, at least one curing annealing is carried out. The curing annealing may be such that the stack has, after annealing, a nominal defect rate less than at least 50% of an initial defect rate of the stack.