Phase-Compensated Bias Circuit for Wideband PA Linearity

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Solution Overview

Problem

In power amplifier circuits for high-frequency modulation wave bands, such as those in 5G communication standards, existing bias circuits face challenges in maintaining sufficient phase margin and signal linearity due to the widening of the gain band, leading to unstable negative feedback and deteriorated signal linearity.

Innovation Solution

A bias circuit configuration that includes a phase compensation circuit, specifically a high pass filter circuit, to advance the phase of signals and provide a sufficient phase margin, while also incorporating a low pass filter circuit to stabilize the bias current and voltage supply to the amplifier transistor, ensuring stability and high voltage gain even at high frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the gain band of the bias circuit is widened to support high-frequency modulation wave bands, then the adaptability to new communication standards is improved, but the phase margin becomes insufficient and negative feedback stability deteriorates

Engineering Contradiction:
Improveadaptability to new communication standardsVSAvoidphase margin and negative feedback stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The bias circuit is segmented into multiple transistor stages (first transistor for reference current input, second transistor for phase compensation, third transistor for bias output, fourth transistor for stabilization) with dedicated functions. This segmentation allows each stage to be optimized independently, enabling the circuit to achieve both wide bandwidth adaptability and sufficient phase margin through coordinated operation of discrete stages.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second transistor acts as an intermediary phase compensation stage between the reference current input and the bias output. It introduces a phase lead effect that compensates for phase lag in the feedback path, thereby maintaining phase margin and negative feedback stability across the widened frequency band without limiting the bandwidth.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the bias circuit is designed for high frequency bands with sufficient phase margin, then the stability is improved, but the voltage gain becomes insufficient and signal linearity deteriorates

Engineering Contradiction:
Improvestability with sufficient phase marginVSAvoidsignal amplification linearity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The circuit implements negative feedback through the fourth transistor that samples the output bias current and feeds it back to the input stage. This feedback mechanism automatically stabilizes the operating point and compensates for nonlinearities, enabling the circuit to achieve both high voltage gain and improved signal linearity while maintaining sufficient phase margin through the phase compensation transistor.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11489497B2Bias circuit
Publication Date: 2022.11.01 MURATA MFG CO LTD
  • US11489497B2 patent drawing
  • US11489497B2 patent drawing
  • US11489497B2 patent drawing

AI summary

A bias circuit includes first to fourth transistors and a phase compensation circuit. In the first transistor, a reference current or voltage is supplied to a first terminal, and the first terminal and a second terminal are connected. In the second transistor, a first terminal is connected to the first transistor, and a third terminal is grounded. In the third transistor, a power supply voltage is supplied to a first terminal, a second terminal is connected to the first transistor, and a bias current or voltage is supplied from a third terminal to an amplifier transistor. In the fourth transistor, a first terminal is connected to the third transistor, a second terminal is connected to the second transistor, and a third terminal is grounded. The phase compensation circuit is provided in a path extending from the fourth transistor to the third transistor through the second and first transistors.