Phase Conflict Graph for Phase-Assignable PSM Layouts
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing complexity of phase conflicts in semiconductor chip layouts due to miniaturization makes it difficult to assign phases to phase shifters, leading to layouts that are not phase-assignable, which affects printability and yield, as traditional design rules fail to capture these constraints effectively.
Innovation Solution
A system constructs a phase-conflict graph, makes it planar and bipartite, identifies a minimal set of phase conflicts, and adds or removes edges to correct these conflicts, ensuring the layout is phase-assignable by adding space between overlapping shifters to allow different phase shifts, thereby reducing the number of corrections required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional design rules are used for layout generation, then the layout satisfies basic design rules, but the layout may still have phase conflicts that make it non-phase-assignable
Solution Approach 1:
The patent applies preliminary action by constructing a phase-conflict graph during the layout generation phase to identify and correct phase conflicts before the layout is finalized. The system proactively detects potential phase conflicts by building a graph where nodes represent phase shifters and edges represent phase relationships, then corrects conflicts by modifying the layout or phase assignments before manufacturing, preventing the propagation of non-phase-assignable layouts to subsequent production stages.
2Productivity
If the number of critical features increases due to miniaturization, then more features can be imaged, but the number and complexity of phase conflicts increases
Solution Approach 1:
The patent applies segmentation by dividing the complex phase conflict detection and resolution problem into manageable components: (1) constructing a phase-conflict graph where nodes represent phase shifters and edges represent phase relationships, (2) identifying specific conflict patterns such as odd cycles and overlapping shifters, (3) systematically resolving conflicts through graph manipulation techniques. This segmented approach makes the complex problem of handling multiple critical features tractable and scalable.
3Productivity
If phase conflicts are not identified and corrected, then the layout can proceed to manufacturing, but printability and yield are adversely affected
Solution Approach 1:
The patent implements preliminary action by integrating phase conflict detection and correction into the pre-manufacturing design phase. The system constructs a phase-conflict graph, identifies conflicts such as odd cycles and overlapping shifters, and resolves them before the layout proceeds to manufacturing. This proactive approach ensures that only phase-assignable layouts are manufactured, eliminating printability issues and yield losses that would occur if conflicts were detected too late in the process.
Data Source
AI summary
One embodiment of the present invention provides a system that identifies a substantially minimal set of phase conflicts in a PSM-layout that when corrected renders the layout phase-assignable. During operation, the system constructs a phase-conflict graph from a PSM-layout. Next, the system removes a first set of edges from the phase-conflict graph to make the graph planar, and then removes a second set of edges to make the graph bipartite. The system then adds zero or more edges of the first set of edges, and determines a set of phase conflicts in the PSM-layout based on the remaining edges in the first set of edges and the second set of edges. Next, the system identifies a set of lines in the layout, such that adding space along the set of lines results in a phase-assignable PSM-layout.