Phase Controller Synchronizes Display Panel Timelines
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Solution Overview
Problem
The synchronization of self-refresh timelines between multiple display panels in computing devices often results in phase differences, leading to inefficiencies and display artifacts due to misaligned refresh cycles, which can cause increased computational load, power consumption, and a poor user experience.
Innovation Solution
A system and method that utilize a phase controller to determine and compute phase shift offsets to synchronize the self-refresh timelines of multiple display panels, providing a unified synchronization signal to reduce or eliminate phase differences and ensure synchronized operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If multiple display panels operate independently with self-refresh timelines, then each panel can function autonomously, but phase differences occur leading to display artifacts and increased computational load
Solution Approach 1:
A controller is introduced as an intermediary component that receives synchronization signals from each display panel, determines phase differences, computes phase shift offsets, and provides corrected synchronization signals back to the panels. This mediator coordinates the autonomous panels to eliminate phase differences and display artifacts while maintaining their independent operation capabilities
Solution Approach 2:
The system implements a feedback mechanism where the controller continuously monitors synchronization signals from display panels, detects phase differences, and adjusts phase shift offsets dynamically. This closed-loop feedback ensures that phase synchronization is maintained over time despite variations in panel operation, resolving the contradiction between autonomous operation and synchronization accuracy
2Reliability
If phase shift offsets are computed and applied to synchronize display panels, then display artifacts are reduced, but computational load and processing complexity increase
Solution Approach 1:
The controller changes the timing parameter of synchronization signals by computing phase shift offsets based on detected phase differences. Instead of complex real-time adjustments, the system calculates simple time offsets and applies them to align the refresh cycles of multiple display panels, achieving synchronization with minimal processing complexity
Solution Approach 2:
The controller computes phase shift offsets in advance based on initial phase difference measurements and applies them before display artifacts can occur. This preliminary synchronization action prevents the need for continuous complex processing, reducing overall computational load while maintaining synchronization accuracy
3Measurement precision
If synchronization signals from multiple display panels are processed separately, then each panel can be monitored independently, but the number of interrupts increases leading to higher power consumption
Solution Approach 1:
The controller merges the processing of synchronization signals from multiple display panels into a unified process. Instead of handling each panel's synchronization signal separately and generating multiple interrupts, the controller processes all signals together, determines phase differences between them, and generates a single coordinated synchronization output, thereby reducing interrupt overhead and power consumption while maintaining monitoring accuracy
Data Source
AI summary
Certain aspects of the present disclosure provide a method for driving a plurality of display panels including a first display panel and a second display panel. The method includes receiving a first synchronization signal from the first display panel. The method further includes receiving a second synchronization signal from the second display panel. The method further includes determining a phase difference between the first synchronization signal and the second synchronization signal. The method further includes computing at least one phase shift offset based on the determined phase difference, the at least one phase shift offset being configured to reduce the phase difference between the first synchronization signal and the second synchronization signal. The method further includes providing a first phase shift offset of the at least one phase shift offset to the first display panel. The method further includes providing a unified synchronization signal to a display processor.