Programmable Phase Delay Circuit for Asynchronous Signal Synchronization
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Solution Overview
Problem
Digital electronic circuits face challenges in processing signals with unknown phase relationships, leading to errors and inefficiencies due to the need for a common clock signal to maintain synchronization across all subsystems, which restricts individual circuits from operating at their optimal speeds and incurs high costs and latency.
Innovation Solution
A circuit and method that generate and set a programmable delay between two signals with an unknown phase relationship by using a phase signal generator, phase select logic, and a second signal generator, allowing asynchronous operation of subsystems without a common clock, enabling each subsystem to operate at its optimal speed while maintaining synchronization only where needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a common clock signal is used to synchronize all subsystems, then phase relationship between signals is maintained, but individual circuits cannot operate at their optimal speeds and power consumption increases
Solution Approach 1:
The system segments the clock synchronization function by allowing each subsystem to have its own independent clock signal with unknown phase relationship to others, rather than using a single common clock. This enables each segment (subsystem) to operate independently at its optimal speed while maintaining functional correctness through the delay tracking mechanism.
Solution Approach 2:
The patent introduces delay tracking circuits as intermediaries between subsystems with different clock phases. These tracking circuits measure and compensate for phase differences, acting as a mediator that enables communication and data exchange between asynchronously clocked subsystems without requiring them to share a common clock frequency or phase.
2Reliability
If a common clock signal is distributed to the entire system, then synchronization is maintained, but die area and power consumption increase
Solution Approach 1:
The patent extracts the clock signal distribution function from the global level, removing the requirement for a common clock to be distributed throughout the entire system. Each subsystem generates its own clock signal locally, eliminating the need for extensive clock distribution networks and reducing die area consumption.
Solution Approach 2:
Each subsystem is given local autonomy to generate and operate with its own clock signal, allowing local optimization of clock frequency and phase according to specific subsystem requirements. The delay tracking mechanism provides just enough coordination at the boundaries between subsystems, rather than imposing global uniformity.
3Productivity
If signals with unknown phase relationship are processed, then asynchronous operation is enabled, but sampling errors occur
Solution Approach 1:
The system performs preliminary delay tracking and measurement before actual data sampling operations. The delay tracking circuits continuously monitor and characterize the phase relationship between clock signals in advance, storing this information for use during subsequent sampling operations to ensure accuracy.
Solution Approach 2:
The patent implements feedback mechanisms where delay tracking circuits continuously monitor phase differences between asynchronous clock signals and use this information to adjust sampling timing. The measured delay information is fed back to the sampling circuits to compensate for phase differences and eliminate sampling errors.
Data Source
AI summary
A circuit and method are provided for setting a phase relationship between a first signal and a second signal having a known frequency relationship to a master signal but having an unknown phase relationship to each other. One or more phase signals is generated based on the master signal, the phase signals having different phases from each other. One of these phase signals is selected based on the phase of the first signal and a target phase delay between the first signal and second signal. The second signal is generated based on the phase and frequency of the selected phase signal.