Phase Detection Circuit Noise Immunity Resolver Converter
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Solution Overview
Problem
Existing resolver/digital converters face challenges in achieving a small-sized and low-cost design with sufficient noise immunity and resistance to variations in center voltage, as they require complex circuits and are prone to errors due to noise interference and increased circuit scale.
Innovation Solution
A phase detection circuit that includes a multiplier, integration circuit, and reference signal generation circuit, which multiplies input signals with a reference signal, integrates the result, and estimates phase information to remove noise and center voltage variations, using a rectangular wave reference signal to enhance noise immunity and simplify the circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If detailed table values are stored in SIN-ROM and COS-ROM to obtain precise Sine and Cosine values, then measurement precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent replaces expensive, complex multiplication type D/A converters with simpler, cheaper addition type D/A converters. This substitution maintains the required measurement precision while significantly reducing circuit complexity and manufacturing cost, directly resolving the technical contradiction between precision and device complexity
Solution Approach 2:
The patent changes the operational parameters of the system by using addition-type D/A converters instead of multiplication-type converters, and implements interpolation with reduced computation requirements. This parameter change allows achieving precise Sine and Cosine values without requiring large ROM tables, thus reducing device complexity while maintaining measurement precision
2Device complexity
If interpolation is performed to reduce the number of table values, then device complexity is reduced, but productivity decreases due to longer computation time
Solution Approach 1:
The patent substitutes complex multiplication operations with simpler addition operations in the D/A converter stage. This mechanical/substitutional change reduces the computational burden significantly, allowing interpolation to be performed with fewer table values without sacrificing computation speed, thus resolving the contradiction between device complexity and productivity
3Measurement precision
If multiplication type D/A converters are used in the primary part of the multiplier, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent explicitly replaces expensive multiplication type D/A converters with cheaper addition type D/A converters. This substitution maintains the required conversion precision while significantly reducing circuit scale and manufacturing cost, directly addressing the technical contradiction between measurement precision and device complexity
Solution Approach 2:
The patent uses a simplified copy of the D/A converter function (addition-type instead of multiplication-type) that achieves the same essential purpose with reduced complexity. This copying approach allows maintaining precision requirements while reducing the circuit scale
4Measurement precision
If zero-cross detectors are used to detect zero-cross points for phase detection, then measurement precision is improved, but reliability decreases due to susceptibility to noise
Solution Approach 1:
The patent introduces an intermediary approach by using addition type D/A converters that process signals through a different mechanism, avoiding direct zero-cross detection. This intermediary method provides noise immunity while maintaining phase detection precision, resolving the contradiction between measurement precision and reliability
Solution Approach 2:
The patent converts the potential harm of noise interference into a benefit by using a detection method that is inherently more resistant to noise. The addition-type D/A converter approach transforms the noise susceptibility problem into an advantage where the same circuit structure provides both precision and noise immunity
Data Source
AI summary
A small-sized and low-cost phase detection circuit which has improved noise immunity. The phase detection circuit comprises a multiplier for multiplying an input signal by a reference signal and outputting a first signal, an integration circuit for integrating the first signal and outputting a second signal, a phase estimation circuit for estimating phase information based on the second signal, and a reference signal generation circuit for generating the reference signal based on the estimated phase information. Since the phase is detected based on information representing an entire waveform, the influence of local noise can be diluted and noise immunity can be improved.