Phase Detection Circuit for Internal Clock Skew Compensation

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Solution Overview

Problem

In semiconductor devices, the phase difference between internal clock signals generated through different clock paths often varies due to skew, affecting the operation reliability by not maintaining a consistent phase difference as required.

Innovation Solution

A clock generation circuit comprising a phase delay circuit, multi-phase clock output circuit, and phase control circuit that detects and adjusts the phases of internal clock signals using edge trigger and duty detection circuits to generate a delay control signal, ensuring consistent phase differences between internal clock signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple internal clock signals are generated through different clock paths, then the clock generation circuit can provide multiple phases for synchronization, but the phase difference between signals varies due to path skew

Engineering Contradiction:
Improvemulti-phase clock generationVSAvoidphase difference consistency
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the phase detection circuit continuously monitors the phase difference between internal clock signals and feeds this information back to the delay control circuit. The delay control circuit then adjusts the delay amount dynamically to compensate for skew variations, ensuring consistent phase differences despite different clock paths

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs self-adjustment by automatically detecting its own phase skew and correcting it through the closed-loop control mechanism. The phase detection circuit and delay control circuit work together to self-regulate the clock signal phases without external intervention, maintaining reliability while providing multi-phase output

Inventive Principle:
Principle #25Self-service

2Reliability

If the phase of internal clock signals is adjusted to maintain consistent phase difference, then operational reliability is improved, but additional phase detection and control circuits are required

Engineering Contradiction:
Improvephase difference consistencyVSAvoidphase control circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the phase detection function and delay control function into an integrated phase control circuit module. By merging these functions into a unified structure with shared components and coordinated operation, the design achieves phase consistency while minimizing the increase in overall device complexity compared to completely separate detection and control systems

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11005479B2Phase detection circuit, and clock generating circuit and semiconductor apparatus using the phase detection circuit
Publication Date: 2021.05.11 SK HYNIX INC
  • US11005479B2 patent drawing
  • US11005479B2 patent drawing
  • US11005479B2 patent drawing

AI summary

A phase detection circuit includes an edge trigger circuit and a duty detection circuit. The edge trigger circuit generates a reference pulse signal and a comparison pulse signal based on a target clock signal and at least two clock signals having phases adjacent to the phase of the target clock signal. The duty detection circuit generates a phase detection signal by detecting the duty ratio of the reference pulse signal and the comparison pulse signal.