Phase Detector Charge Pump Timing for Low-Power DLL Shifting
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Solution Overview
Problem
Existing delay-locked loops (DLLs) face challenges in reducing power consumption while maintaining precise phase shifting, especially as clock frequencies increase, and often rely on master Phase-Locked Loops (PLLs) for phase and frequency information, which can lead to dependency issues.
Innovation Solution
A method and circuit design for a DLL that includes a voltage-controlled delay line, a phase detector generating charge up and charge down control signals, and a charge pump with switching transistors, allowing for efficient charging and discharging of a capacitance to adjust the delay, reducing power consumption by enabling charging and discharging only during specific phases of the clock cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a traditional phase detector circuit is used in a DLL, then phase detection functionality is provided, but power consumption is high due to continuous operation of charge pump transistors
Solution Approach 1:
The charge pump transistors are activated only during specific phases of the clock cycle rather than continuously. The first charge pump transistor is turned on during a first phase to charge the capacitor, and the second charge pump transistor is turned on during a second phase to discharge the capacitor, thereby reducing overall power consumption while maintaining phase detection functionality
Solution Approach 2:
The charge pump function is divided into two separate transistors with distinct activation phases. The first transistor handles charging operations during its designated phase, while the second transistor handles discharging operations during its designated phase, allowing for more efficient power management compared to a single continuously-operating charge pump
2Adaptability or versatility
If charge pump transistors are activated during overlapping phases, then phase adjustment flexibility is improved, but harmful interference between charging and discharging currents occurs
Solution Approach 1:
The charging and discharging operations are separated into distinct periodic phases. The first charge pump transistor operates during a first phase to charge the capacitor, while the second charge pump transistor operates during a second phase to discharge the capacitor, eliminating harmful current interference that would occur if both transistors were activated simultaneously
Solution Approach 2:
The capacitor is fully charged during the first phase before the discharging phase begins. This preliminary charging action ensures that when the second transistor activates for discharging, there is no overlapping current interference, maintaining signal integrity while providing flexible phase adjustment
Data Source
AI summary
The disclosure relates to phase detectors. Charge up and charge down signals that are generated by a phase detector cause i) following detection of a first edge of a reference clock signal, switching on of a switching transistor of sink current; ii) following detection of an edge of a feedback clock signal falling within less than 180 degrees from the first edge, switching on of a switching transistor of source current and switching off of the switching transistor of sink current; and iii) following detection of an edge of another reference signal at a point in time about midway between the first edge and a next similar edge of the reference clock signal has past, switching off of the switching transistor of source current while maintaining the switching transistor of sink current switched off.