Edge-Corrected Phase Detector for Hard-Limited I/Q Signals
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Solution Overview
Problem
Conventional systems for measuring the phase of wireless communication signals are costly and power-intensive, making them unsuitable for low-cost and low-power applications like IoT devices, particularly those using non-linear receiver architectures.
Innovation Solution
A phase detection method that utilizes edge detection and correction circuitry to provide a phase estimate signal based on the in-phase and quadrature signals, even when these signals are hard-limited, allowing for accurate phase measurement in non-linear receiver architectures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional phase measurement systems use highly linear receivers, then phase measurement accuracy is improved, but device cost and power consumption increase
Solution Approach 1:
The patent changes the measurement parameter from requiring linear signal amplitude relationships to using zero-crossing timing of hard-limited signals. By measuring phase through time-domain edge detection rather than amplitude-domain correlation, the system achieves accurate phase measurement without requiring linear receiver characteristics
Solution Approach 2:
The patent replaces the conventional mechanical/electrical linear signal processing approach with a digital timing-based measurement system. Instead of using linear analog circuits to preserve signal relationships, the system uses digital edge detection and timing measurement to determine phase, eliminating the need for linear hardware
2Device complexity
If hard-limited signals are used in non-linear receivers, then device cost and power consumption are reduced, but phase measurement accuracy deteriorates due to signal distortion
Solution Approach 1:
The patent converts the harmful effect of hard limiting (signal distortion) into a beneficial feature by exploiting the predictable zero-crossing behavior of hard-limited signals. The sharp edges created by hard limiting provide precise, unambiguous timing references for phase measurement, turning signal distortion into a measurement advantage
Solution Approach 2:
Instead of trying to preserve the continuous amplitude information that is destroyed by hard limiting, the patent inverts the approach by measuring phase through the timing of the zero-crossing events that remain after hard limiting. This inversion transforms a lossy measurement approach into an accurate one by focusing on the preserved temporal characteristics
Data Source
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AI summary
Phase detector circuitry includes oscillator circuitry, edge detection and correction circuitry, sampler circuitry, and adder circuitry. The oscillator circuitry is configured to provide a sawtooth oscillator signal. The edge detection and correction circuitry is configured to receive an in-phase signal and a quadrature signal, provide an edge detection signal during each edge of the in-phase signal and the quadrature signal, and provide an edge correction signal based on whether the edge is in the in-phase signal or the quadrature signal and whether the edge is a rising edge or a falling edge. The sampler circuitry is configured to sample the sawtooth oscillator signal in response to the edge detection signal. The adder circuitry is configured to subtract the edge correction signal from the sampled sawtooth oscillator signal to provide a phase estimate signal.