Phase Difference Control for Sensor Display Synchronization
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Solution Overview
Problem
In photographing apparatuses, synchronizing the clock signals generated by separate clock generation units for sensors and displays is challenging, leading to timing shifts and potential display delays, which can result in excessive or unstable delays in image processing and display.
Innovation Solution
A data processing device with a phase difference control unit that adjusts the phase difference between timing signals for sensors and displays, using a first timing signal generator and a second timing signal generator to ensure accurate synchronization, minimizing delays and maintaining a predetermined phase difference to prevent overtaking of image processing and display.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate clock generation units are used for sensor and display, then independence and flexibility are improved, but timing synchronization and phase stability deteriorate
Solution Approach 1:
The patent implements a feedback mechanism where the phase difference between sensor clock signal and display clock signal is continuously monitored and measured. Based on this feedback, the system automatically adjusts the display clock frequency to maintain the desired phase relationship, resolving the synchronization issue caused by using separate clock generation units.
Solution Approach 2:
The system dynamically changes the frequency parameter of the display clock signal based on the measured phase difference. By adjusting the display clock frequency in response to phase deviations, the system maintains stable timing synchronization while preserving the independence of separate clock generation units.
2Ease of manufacture
If separate clock generation units are used for sensor and display, then design flexibility is improved, but phase difference stability deteriorates
Solution Approach 1:
The phase difference detection circuit continuously monitors the phase relationship between sensor and display clock signals, providing feedback that enables automatic compensation. This feedback loop maintains stable phase difference despite using separate clock generation units, achieving both design flexibility and phase stability.
Solution Approach 2:
The system performs self-adjustment by automatically detecting phase differences and correcting frequency deviations without external intervention. The self-service mechanism maintains phase stability while preserving the independence of separate clock generation units, combining ease of manufacture with stable operation.
3Reliability
If display timing is delayed by exactly ΔT from sensor timing, then display synchronization is improved, but timing precision deteriorates due to clock shifts
Solution Approach 1:
The system uses feedback from phase difference detection to continuously adjust the display clock frequency, compensating for accumulated timing errors. This feedback mechanism maintains both the ΔT delay relationship and high timing precision, overcoming the limitations of separate clock generation units.
Solution Approach 2:
The display clock frequency parameter is dynamically adjusted based on measured phase differences to maintain precise timing. By changing the frequency parameter in response to timing deviations, the system preserves both synchronization reliability and timing precision despite using separate clock sources.
4Reliability
If reading speed is slowed during line reading, then conflict between reading and writing is avoided, but productivity deteriorates
Solution Approach 1:
The system dynamically adjusts the reading speed based on the phase difference between sensor and display operations. Rather than uniformly slowing reading speed, the adaptive control modifies timing in real-time to avoid conflicts while maintaining high productivity during non-conflicting periods.
Solution Approach 2:
The reading timing parameters are dynamically changed based on phase difference measurements. By adjusting reading speed and timing in response to operational conflicts, the system avoids data conflicts while minimizing impact on overall productivity, unlike static slowing approaches.
Data Source
AI summary
A data processing device includes first and second timing signal generators, a phase difference control unit, first and second output units, a data generating unit, a data generating unit, and an error determination unit. The phase difference control unit controls a phase difference between the first and second timing signals to be a predetermined phase difference. The first output unit outputs a first data at a timing based on the first timing signal. The data generating unit generates a second data by a prescribed unit based on the first data. The second output unit outputs the second data by the prescribed unit at a timing based on the second timing signal. The error determination unit determines there is an error when an Nth unit of the second data has not been generated at a timing at which the Nth unit of the second data is to be output.