Digital Phase Difference Detection With Pulse-Length TDCs
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Solution Overview
Problem
Existing digital phase-locked loops (DPLLs) face challenges in efficiently representing phase differences between input signals due to limited resolution in time-to-digital converters (TDCs), leading to increased power consumption and complexity.
Innovation Solution
The proposed apparatus employs a phase frequency detector (PFD) and pulse length modifying time-to-digital converters (TDCs) to provide a digital representation of the phase difference, allowing for a trade-off between resolution and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the resolution of the TDC is increased to reduce quantization noise, then measurement precision is improved, but power consumption and device complexity increase
Solution Approach 1:
The phase difference measurement is divided into two independent components: an integer number of periods (N) measured by a period counter, and a fractional period (Δt) measured by a simplified TDC with reduced resolution requirements. This segmentation allows each component to be optimized independently, reducing the overall power consumption and complexity while maintaining high measurement precision.
Solution Approach 2:
The measurement approach transitions from a single-dimensional high-resolution TDC to a two-dimensional measurement system combining period counting (integer dimension) and fractional period measurement (fractional dimension). This dimensional change enables the system to achieve high overall precision without requiring high resolution in the fractional part, thereby reducing power consumption and complexity.
2Measurement precision
If the resolution of the TDC is increased to reduce quantization noise, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The measurement function is segmented between a period counter that handles integer periods and a simplified TDC that handles only the fractional part. This segmentation reduces the complexity of the TDC by removing the need for it to count full periods, while the period counter manages the integer component, achieving high precision with lower overall device complexity.
Solution Approach 2:
The integer period counting function is extracted from the TDC and assigned to a separate period counter. This extraction simplifies the TDC architecture by eliminating the need for it to handle large period counts, reducing device complexity while maintaining high measurement precision through the combined system.
3Measurement precision
If a single high-resolution TDC is used to measure phase difference, then measurement precision is improved, but the device becomes more power-consuming and complex compared to using a period counter and simplified TDC
Solution Approach 1:
The phase difference measurement system is segmented into two specialized components: a period counter for integer periods and a simplified TDC for fractional periods. This segmentation allows each component to be optimized for its specific function, reducing overall device complexity while achieving high measurement precision that would require a much more complex single high-resolution TDC.
Solution Approach 2:
The system achieves multi-functionality by combining a period counter and a simplified TDC to handle both integer and fractional period measurements. This multi-functional approach replaces what would otherwise require a single complex high-resolution TDC, reducing overall device complexity while maintaining comprehensive measurement capability.
Data Source
AI summary
An apparatus is disclosed for provision of an indication of an angular difference between first and second input signals. The apparatus comprises a phase frequency detector (PFD) configured to receive the first and second input signals and to provide first and second outputs based on the first and second input signals. A difference in pulse length between signals provided at the first and second outputs is indicative of the phase difference between the first and second input signals. The apparatus also comprises first and second time-to-digital converters (TDCs) each configured to receive one of the signals provided by the PFD and to provide a corresponding digital pulse length representation. Each of the TDCs is a pulse length modifying TDC, wherein pulse length modification may comprise pulse length shrinking or pulse length extension. The apparatus also comprises a comparator configured to provide the indication of the phase difference based on the digital pulse length representations provided by the first and second TDCs. Corresponding digital phase-locked loop (DPLL) and communication device are also disclosed.