Phase-Domain Digitizer Using Digital Delta-Sigma Modulation

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Solution Overview

Problem

Existing phase digitizers face challenges in modern nanometer-scale CMOS processes due to non-idealities in analog implementations, such as limited dynamic range, non-linearity, and charge injection, making it difficult to achieve high precision and accuracy in temperature sensing for advanced microprocessors.

Innovation Solution

A phase digitizer with a digital phase-domain delta-sigma modulator that determines demodulated phase errors using a set of reference signals, filtered by a digital filter, and sampled by a latch to provide a bit stream representing the phase, with control logic selecting the reference signals and potentially including a trimming mechanism to set the carrier frequency, facilitating high precision and reduced non-linearity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If analog phase detection circuits are used in nanometer-scale CMOS processes, then the circuit can be implemented, but the measurement precision deteriorates due to non-idealities such as limited dynamic range, non-linearity, and charge injection

Engineering Contradiction:
Improvephase digitization precisionVSAvoidcircuit performance reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent replaces the analog phase detection circuit with a digital phase-domain delta-sigma modulator. The phase detector, loop filter, and quantizer are implemented using digital logic circuits (D-flip-flops, XOR gates, counters) instead of analog components, eliminating the non-idealities associated with analog implementations in nanometer-scale CMOS processes while maintaining phase detection functionality

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the operating domain from analog to digital by using digital signals and digital logic operations. The phase error is detected and processed in the digital domain using clock signals and digital counters, fundamentally changing the parameter domain to avoid analog non-idealities while achieving high measurement precision

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If digital phase-domain delta-sigma modulator is used, then measurement precision is improved, but device complexity increases due to additional digital filter and control logic

Engineering Contradiction:
Improvephase digitization precisionVSAvoiddigitizer circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the phase detector, loop filter, and quantizer into a single integrated digital phase-domain delta-sigma modulator circuit. The D-flip-flop, XOR gate, and counter are combined in a unified digital architecture that performs all three functions simultaneously, reducing overall device complexity while maintaining high measurement precision

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The digital phase-domain delta-sigma modulator serves multiple functions: it detects phase error, filters the signal digitally, and quantizes the output. The same digital circuitry (D-flip-flop, XOR gate, counter) performs multiple operations, making the device universal and reducing the need for separate dedicated circuits for each function

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20160087824A1Phase-Domain Digitizer
Publication Date: 2016.03.24 TECH UNIV DELFT
  • US20160087824A1 patent drawing
  • US20160087824A1 patent drawing
  • US20160087824A1 patent drawing

AI summary

A phase-domain delta-sigma (ΔΣ) modulator in a phase digitizer determines a demodulated phase error based on a phase-modulated frequency signal, in which a carrier frequency is modulated with a fundamental frequency and an associated phase, and a selected one of a set of reference signals, where the demodulated phase error represents a difference between the phase and a reference phase of the selected one of the set of reference signals. Moreover, a digital filter in the phase-domain ΔΣ modulator filters the demodulated phase error. Furthermore, a latch in the phase-domain ΔΣ modulator provides a bit stream by sampling one or more bits of the filtered demodulated phase error, where an average value of the bit stream represents the phase. Next, control logic in the phase-domain ΔΣ modulator selects the one of the set of reference signals.