Phase Error Detection for Stable Clock Generation
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Solution Overview
Problem
High-density optical disc recording systems face challenges in generating a stable reproduction clock signal due to increased intersymbol interference and Signal Noise Rate (SNR) deterioration, especially when recording capacities exceed the limit of optical resolution, making it difficult to detect phase information and maintain system margin.
Innovation Solution
A phase error detecting device that includes a waveform shaping portion, maximum likelihood decoding portion, and synchronization detection portion, which extracts phase errors using state transition patterns with a single zero cross point during maximum likelihood decoding, enabling the generation of a stable reproduction clock signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-order PRML is adopted to maintain system margin at high recording densities, then the system margin is maintained, but the complexity of signal processing increases and phase error detection becomes more difficult
Solution Approach 1:
The patent segments the phase error detection process by identifying specific merging points in the trellis diagram where paths converge, and selectively extracting phase error information only at these critical points rather than processing the entire signal continuously. This reduces computational complexity while maintaining detection accuracy for high-order PRML systems.
Solution Approach 2:
The patent applies local quality by focusing phase error detection only at specific locations (merging points) in the signal processing timeline where phase information is most reliable and critical. Instead of uniform processing throughout the entire signal, the system concentrates computational resources at these localized critical points, reducing overall complexity while maintaining system margin.
2Quantity of substance
If recording line density is increased to enhance recording capacity, then the recording capacity increases, but intersymbol interference and SNR deterioration occur
Solution Approach 1:
The patent converts the harmful effects of intersymbol interference into beneficial phase error information by using the interference patterns themselves as indicators of phase displacement. The Viterbi decoding process treats the interference-induced waveform variations as carryover information that can be systematically extracted and corrected, transforming the harmful intersymbol interference into useful phase error detection signals.
Solution Approach 2:
The patent introduces an intermediary processing layer between the raw reproduced signal and the final decoded signal. This intermediary Viterbi decoding process with selective phase error extraction acts as a mediator that processes the signal through multiple stages, filtering out noise while preserving and correcting phase information, thereby reducing the impact of intersymbol interference at high recording densities.
3Ease of manufacture
If conventional level determination method is used, then the processing is simple, but jitter evaluation is not correlated with PRML performance
Solution Approach 1:
The patent changes the evaluation parameter from conventional jitter (which is based on timing variations) to phase error (which directly measures phase displacement in the modulated signal). This parameter transformation enables accurate evaluation of PRML performance by directly measuring the phase errors introduced by intersymbol interference, while the extraction process remains integrated into the existing Viterbi decoding framework, maintaining processing feasibility.
Data Source
AI summary
A waveform shaping portion receives a digital reproduced signal generated from an analog reproduced signal reproduced from an information recording medium and shapes the waveform of the digital reproduced signal. A maximum likelihood decoding portion applies maximum likelihood decoding to the digital reproduced signal in the shaped waveform and generates a binarized signal indicating the result of the maximum likelihood decoding. A phase detection portion extracts, during the maximum likelihood decoding, a phase error using state transition patterns having only a single zero cross point among differential metrics at a plurality of merging points at which a set of paths branched from a given state merges. A synchronization detection portion generates a reproduction clock signal using the phase error that has been detected and brings the digital reproduced signal into synchronization with the reproduction clock signal that has been generated. This configuration makes it possible to generate a reproduction clock signal in a stable manner.