Separate Phase and Frequency Paths for Packet Timing Recovery
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Solution Overview
Problem
Existing IEEE 1588 timing over packet systems face challenges in providing well-defined wander transfer characteristics and maintaining good wander generation performance in the presence of network packet delay variations, while also meeting ITU timing standards.
Innovation Solution
The proposed solution involves an integrated phase and frequency recovery architecture with separate closed and quasi-open-loop filters for phase and frequency data, allowing for independent optimization of phase and frequency paths and improved handling of packet delay variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a combined phase and frequency processing approach is used in IEEE 1588 timing systems, then the system structure is simpler, but the wander transfer characteristics are not well-defined and performance degrades under packet delay variations
Solution Approach 1:
The patent divides the timing recovery system into separate phase processing and frequency processing paths. The phase path processes phase error using a phase detector and phase accumulator, while the frequency path processes frequency error separately using a frequency detector and frequency accumulator. This segmentation allows independent optimization of each path's transfer function characteristics, resolving the contradiction by sacrificing some structural simplicity for significantly improved reliability and defined wander transfer characteristics.
2Device complexity
If traditional single-loop phase locked loop is used, then the device complexity is low, but the system cannot independently optimize phase and frequency paths for different transfer function requirements
Solution Approach 1:
The patent implements separate phase and frequency processing paths that can be independently configured. Each path has its own detector, accumulator, and filter characteristics, allowing independent optimization of transfer functions for different ITU timing standards requirements. This segmentation provides the adaptability to meet diverse timing specifications while maintaining reasonable device complexity through modular architecture.
Solution Approach 2:
The system dynamically selects and switches between different transfer function characteristics for the phase and frequency paths based on the required ITU timing standards. The separate processing paths enable dynamic adjustment of phase and frequency response characteristics without requiring complete system redesign, enhancing adaptability while controlling complexity.
3Device complexity
If combined phase error processing is used, then the processing logic is simpler, but the system cannot provide intelligent filtering of noise sources and packet delay variations
Solution Approach 1:
The patent separates phase error processing and frequency error processing into distinct logical paths. The phase path uses a phase detector and phase accumulator with specific filtering characteristics, while the frequency path uses a frequency detector and frequency accumulator with different filtering characteristics. This segmentation enables intelligent filtering of different noise sources and packet delay variations, as each path can be optimized for its specific error type, resolving the contradiction between processing logic simplicity and noise filtering precision.
Data Source
AI summary
One or more examples relate, generally to phase and frequency error processing. An apparatus includes a phase path and a frequency path. The phase path processes phase error of communications between network nodes. The phase path includes a closed-loop feedback loop controller. The frequency path processes frequency error of the communications between the network nodes. The frequency path is separate from the phase path. A method of processing phase error and frequency error includes selecting first packets for phase processing, processing the first packets for phase error, selecting second packets for frequency processing, and processing the second packets for frequency error independently of the processing of the first packets.