Phase-Interpolated Spread-Spectrum Clocking for Filterable Jitter
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Solution Overview
Problem
High-frequency jitter in spread-spectrum clock signals generated by conventional spread-spectrum clock generators is not effectively filtered by clock data recovery (CDR) processes, leading to residual jitter issues.
Innovation Solution
A spread-spectrum clock generator that employs a phase interpolator mixing clock signals with different phases and a controller generating control signals to modulate the clock signal, with the phase interpolator adjusting the modulation speed by regulating the generation speed of current weights, thereby reducing high-frequency jitter through gradual phase variation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional spread-spectrum clock generation is used to reduce EMI, then electromagnetic interference is reduced, but high-frequency jitter is generated that cannot be filtered by CDR
Solution Approach 1:
The patent applies dynamics by making the phase modulation speed variable rather than fixed. The phase interpolator dynamically adjusts the modulation speed based on the spread spectrum modulation index, slowing down the modulation process when necessary to prevent abrupt phase changes. This dynamic adjustment resolves the contradiction by enabling EMI reduction while maintaining jitter within filterable limits through adaptive control of the modulation characteristics.
Solution Approach 2:
The patent introduces a phase interpolator as an intermediary component between the spread spectrum modulator and the clock signal path. This intermediary device gradually interpolates phase changes instead of allowing abrupt transitions, thereby reducing high-frequency jitter components while maintaining the spread spectrum EMI reduction effect. The phase interpolator acts as a mediator that smooths the transition characteristics.
2Object-affected harmful factors
If abrupt phase modulation is applied to spread-spectrum clock signal, then EMI reduction is achieved, but high-frequency jitter increases that remains after CDR filtering
Solution Approach 1:
The system dynamically adjusts the phase modulation characteristics based on the spread spectrum modulation index. When the modulation index indicates potential for abrupt phase changes, the system automatically slows down the modulation speed through the phase interpolator. This dynamic adaptation ensures precise phase control while maintaining effective EMI reduction, resolving the contradiction between EMI reduction and phase modulation precision.
Solution Approach 2:
The patent changes the modulation speed parameter adaptively based on the spread spectrum modulation index. By varying the modulation speed parameter in response to different operating conditions, the system achieves both EMI reduction and precise phase control. This parameter change approach allows the system to optimize performance across different spread spectrum configurations.
3Speed
If phase modulation speed is increased for faster response, then modulation efficiency improves, but high-frequency jitter is generated that cannot be filtered
Solution Approach 1:
The system implements dynamic speed control where the phase interpolator adjusts the effective modulation speed based on real-time conditions. Rather than using a fixed high speed that generates unacceptable jitter, the system dynamically optimizes the modulation speed to achieve the necessary response while keeping jitter within filterable limits. This resolves the contradiction between speed and reliability.
Solution Approach 2:
The system employs feedback mechanisms where the characteristics of the spread spectrum modulation index influence the phase interpolation process. The phase interpolator responds to the modulation characteristics and adjusts its operation accordingly, creating a feedback loop that prevents excessive jitter generation while maintaining efficient modulation. This feedback control resolves the speed-jitter contradiction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces high-frequency jitter, ensuring that the spread-spectrum clock signal can be properly filtered by the CDR process at the reception stage, preventing interference and improving signal stability.
Implementation Method 1
a phase interpolator mixing a plurality of clock signals, which are different each other in phase, and modulating a clock signal resulting from the clock signal mixture
Data Source
AI summary
A spread-spectrum clock generator includes: a phase interpolator mixing a plurality of clock signals, which differ from each other in phase, and modulating a clock signal resulting from mixing the clock signals; and a controller generating a control signal to generate weights of the plurality of clock signals for modulating the clock signal. The phase interpolator regulates a modulation speed of the clock by adjusting a generation speed of the weights.


