Phase-Interpolated A/D Conversion for Column Clock Distribution
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Solution Overview
Problem
Existing A/D conversion devices in imaging elements face challenges in achieving high speed and high resolution due to the difficulty in increasing the frequency of the reference clock, which needs to be distributed to all columns, making it hard to operate efficiently.
Innovation Solution
The use of a phase-difference clock generation unit with multiple phase interpolators to generate multi-phase clock signals from an input clock signal, allowing for A/D conversion using these signals, which can be distributed to specific columns or regions of a pixel array, enabling higher resolution and speed without the need for high-frequency clock distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the frequency of the reference clock is increased to achieve high speed or high resolution, then the A/D conversion speed and resolution are improved, but the difficulty of distributing the reference clock to all columns increases
Solution Approach 1:
The patent divides the pixel array into multiple columns, each with its own independent A/D converter. This segmentation allows each column to perform A/D conversion independently using lower frequency clock signals, avoiding the need to distribute high frequency reference clocks across all columns simultaneously.
Solution Approach 2:
The patent introduces a time dimension by sequentially performing A/D conversion across different columns at different time periods. Instead of converting all columns simultaneously (spatial dimension only), the system uses temporal multiplexing to achieve high resolution without requiring high frequency clock distribution across all columns at once.
2Productivity
If the frequency of the reference clock is increased to achieve high speed A/D conversion, then the conversion speed is improved, but the power consumption and circuit complexity increase
Solution Approach 1:
The patent employs periodic sequential operation where A/D conversion is performed column by column in successive time periods. Each column uses a moderate frequency clock, but the overall system achieves high conversion speed through the periodic sequential processing of multiple columns, avoiding the need for continuously high frequency operation across all columns.
Solution Approach 2:
The system performs preliminary analog signal processing and accumulation in each column before digital conversion. By pre-processing the analog signals and using correlation methods, the system reduces the computational burden during the actual A/D conversion phase, enabling faster conversion without requiring excessively high clock frequencies.
Data Source
AI summary
An A/D conversion device includes a phase-difference clock generation unit configured to use a plurality of phase interpolators to generate multi-phase clock signals, of which phases are shifted with respect to an input clock signal, from the input clock signal and a signal obtained by delaying the input clock signal; and an A/D conversion unit configured to perform A/D conversion on an input analog signal using the multi-phase clock signals generated by the phase-difference clock generation unit.


