Phase Interpolation Circuit Linear Control via Triode Mirroring
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Solution Overview
Problem
Conventional phase interpolation circuits exhibit non-linear relationships between phase control signals and resultant phase offsets, leading to operational instability and complex adjustments, especially when incrementally varying the control value A.
Innovation Solution
An alternative phase interpolator utilizing the relationship W=A*sin(ωt)+(1-A)*cos(ωt) with phase varying as arcsin(√A), implemented using modified current mirror circuits with saturated and triode-mode transistors to achieve a more linear control behavior over a wider range of A.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional phase interpolation circuits use the relationship W=A*sin(ωt)+(1-A)*cos(ωt), then the phase control is simple to implement, but the phase relationship becomes non-linear as A varies, causing operational instability
Solution Approach 1:
The patent transforms the control parameter relationship by introducing a square root transformation. Instead of directly using control voltage A to weight the sine and cosine signals, the circuit first generates √A and √(1-A) through transistor current relationships. This parameter transformation changes the phase control characteristic from arctan(A/(1-A)) to arcsin(√A), which is approximately linear over the full range A∈[0,1], thereby resolving the non-linearity issue while maintaining implementation simplicity
2Ease of operation
If the control value A is incrementally varied in conventional phase interpolators, then adjustment is straightforward, but the non-linear phase response complicates adjustment and may introduce operational instability
Solution Approach 1:
By changing the mathematical relationship from linear weighting A and (1-A) to square root weighting √A and √(1-A), the patent makes the phase response approximately linear with respect to A. This means incremental changes in A produce approximately equal incremental changes in phase output across the entire range, simplifying adjustment predictability and eliminating the need for complex compensation functions
3Ease of manufacture
If phase interpolation circuits use standard current mirror circuits, then the circuit implementation is straightforward, but the output current relationship remains non-linear with respect to control voltage
Solution Approach 1:
The patent modifies the standard current mirror circuit by operating the mirror transistors in the triode region rather than saturation region. This operational mode change transforms the current relationship from linear (Iout = Iin) to square root relationship (Iout ∝ √Iin). By combining this with appropriate biasing, the circuit achieves output currents proportional to √A and √(1-A), providing the desired linear phase response while using standard transistor components and straightforward circuit topology
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides approximately linear phase control over a wider range of A, reducing operational instability and simplifying incremental adjustments, as demonstrated by the circuit diagrams and graphs showing improved linearity compared to prior art.
Implementation Method 1
connected to a triode mirroring FET, the triode mirroring FETs configured to generate linearized current drive signals through first and second output drive nodes
Data Source
AI summary
A phase control circuit comprising a differential current generator having a differential output node configured to provide a differential drive current and a current conversion circuit connected to the differential output node configured to receive the differential drive current through saturated input Field-Effect Transistors (FETs), the saturated input FETs connected to triode mirroring FETs, the triode mirroring FETs configured to generate linearized current drive signals through first and second output drive nodes to drive a phase interpolator circuit.


