Phase Interpolator Bias Compensation for Process Variation Linearity

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Solution Overview

Problem

The phase interpolator in existing circuits suffers from poor linearity due to manufacture process variations, limiting its applications.

Innovation Solution

A signal converting circuit is designed with a phase interpolator circuit and a bias voltage generation circuit. The bias voltage generation circuit generates a bias voltage based on reference information related to manufacture process variations, which is used to correct the phase interpolator circuit, ensuring the output clock signal has a predetermined phase corresponding to specific digital signal bit configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conventional phase interpolator circuit is used, then the circuit structure is simple, but the linearity is poor due to manufacture process variations

Engineering Contradiction:
ImprovelinearityVSAvoidcircuit structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by generating a bias voltage in advance that compensates for manufacture process variations. The bias voltage generation circuit pre-calculates and provides the appropriate bias voltage to the phase interpolator circuit before operation, thereby preemptively correcting the linearity issues that would otherwise arise from manufacturing variations. This resolves the contradiction by improving linearity through preliminary compensation without requiring complex post-manufacturing adjustments.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs parameter changes by dynamically adjusting the bias voltage parameter based on manufacture process variations. The bias voltage generation circuit modifies the bias voltage parameter to compensate for deviations caused by manufacturing tolerances, thereby improving linearity. This approach allows the system to adapt to manufacturing variations through parameter adjustment rather than requiring complex circuit restructuring.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If compensation for manufacture process variations is implemented, then the linearity improves, but the circuit complexity increases

Engineering Contradiction:
ImprovelinearityVSAvoidcircuit structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the circuit into two functional modules: the phase interpolator circuit and the bias voltage generation circuit. The bias voltage generation circuit is further segmented into a reference circuit and a current source. This modular segmentation allows the compensation function to be isolated in a dedicated subsystem, improving linearity while containing the complexity increase to a specific module rather than the entire circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses the bias voltage as an intermediary element that mediates between the manufacture process variations and the phase interpolator performance. The bias voltage generation circuit acts as an intermediary subsystem that translates reference information into compensating bias voltages, which then correct the phase interpolator's linearity issues. This intermediary approach improves linearity while maintaining relatively simple circuit architecture by using voltage as the mediation mechanism.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12334916B2Signal converting circuit and bias voltage generation circuit thereof
Publication Date: 2025.06.17 REALTEK SEMICON CORP
  • US12334916B2 patent drawing
  • US12334916B2 patent drawing
  • US12334916B2 patent drawing

AI summary

The present disclosure provides a signal converting circuit including a phase interpolator circuit and a bias voltage generation circuit. The phase interpolator circuit is configured to convert multiple input clock signals into an output clock signal according to a digital signal. The bias voltage generation circuit is electrically coupled to the phase interpolator circuit, is configured to generate a bias voltage according to reference information and is configured to output the bias voltage to the phase interpolator circuit, so that the output clock signal has a predetermined phase corresponding to one of multiple bit configurations of the digital signal. The reference information is relevant to a change of the phase interpolator circuit due to a manufacture process variation.